[coreboot] [PATCH] flashrom support for HP DL145 G3

Mondrian Nuessle nuessle at uni-hd.de
Mon Mar 30 11:29:17 CEST 2009


Hi,
0xcd6/cd7 are the Power Management registers of the Southbridge (BCM5785).
Actually this is very similar to the way the IBM x3455 is handled in board_enable.c.

I attached a somewhat improved patch including comments and subsytem id.
If anybody knows how to do all this more elegantly, that would be great.

Regards,
Mondrian


-- 
 Dr. Mondrian Nuessle
 Phone: +49 621 181 2717          University of Heidelberg
 Fax:   +49 621 181 2713          Computer Architecture Group
 mailto:nuessle at uni-hd.de         http://ra.ziti.uni-heidelberg.de
-------------- next part --------------
A non-text attachment was scrubbed...
Name: hp_dl145_g3_flashrom.patch
Type: text/x-patch
Size: 1447 bytes
Desc: not available
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20090330/02a26142/attachment.patch>


More information about the coreboot mailing list