[coreboot] Debug help
peter at stuge.se
Sun May 10 16:12:39 CEST 2009
ron minnich wrote:
> > Is there some way that the serial port could be misconfigured so
> > that if you write to it too quickly you overflow the buffer and
> > lose output?
> it could be a hardware glitch actually. The code tests the tx ready
> bit and won't send until it is set.
All UARTs these days have FIFO, which could fail in theory, if
coreboot is using it? It's not so likely though..
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