[coreboot] [flashrom] r516 - trunk
svn at coreboot.org
svn at coreboot.org
Sat May 16 01:36:24 CEST 2009
Author: hailfinger
Date: 2009-05-16 01:36:23 +0200 (Sat, 16 May 2009)
New Revision: 516
Modified:
trunk/chipset_enable.c
Log:
Uwe tested the recent SB600 SPI commit and notified me of one unexpected
problem. It seems some boards do not use SPI_HOLD at all. Take that into
account when trying to figure out if SPI is available.
Print the SB600 ROM strap override register status for better debugging.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>
Modified: trunk/chipset_enable.c
===================================================================
--- trunk/chipset_enable.c 2009-05-15 17:02:34 UTC (rev 515)
+++ trunk/chipset_enable.c 2009-05-15 23:36:23 UTC (rev 516)
@@ -719,7 +719,8 @@
reg &= 0xC0;
printf_debug("GPIO31 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_HOLD");
printf_debug("GPIO32 used for %s\n", (reg & (1 << 7)) ? "GPIO" : "SPI_CS");
- if (reg != 0x00)
+ /* SPI_HOLD is not used on all boards, filter it out. */
+ if ((reg & 0x80) != 0x00)
has_spi = 0;
/* GPIO47/SPI_CLK status */
reg = pci_read_byte(smbus_dev, 0xA7);
@@ -732,6 +733,29 @@
if (has_spi)
flashbus = BUS_TYPE_SB600_SPI;
+ /* Read ROM strap override register. */
+ OUTB(0x8f, 0xcd6);
+ reg = INB(0xcd7);
+ reg &= 0x0e;
+ printf_debug("ROM strap override is %sactive", (reg & 0x02) ? "" : "not ");
+ if (reg & 0x02) {
+ switch ((reg & 0x0c) >> 2) {
+ case 0x00:
+ printf_debug(": LPC");
+ break;
+ case 0x01:
+ printf_debug(": PCI");
+ break;
+ case 0x02:
+ printf_debug(": FWH");
+ break;
+ case 0x03:
+ printf_debug(": SPI");
+ break;
+ }
+ }
+ printf_debug("\n");
+
/* Force enable SPI ROM in SB600 PM register.
* If we enable SPI ROM here, we have to disable it after we leave.
* But how can we know which ROM we are going to handle? So we have
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