[coreboot] tyan s2881 with seabios and gpxe

Hugh Greenberg hng at lanl.gov
Fri Oct 2 01:23:40 CEST 2009 

Thanks.  I took option number 2.  It flashed successfully, however, gpxe 
does not seem to be starting.  Here is the output from the coreboot/seabios:

coreboot-2.0.0-r_s2881_Fallback Thu Oct  1 17:07:49 MDT 2009 starting...
(0,1) link=00
(1,0) link=00
02 nodes initialized.
core0 started:  01
started ap apicid:
SBLink=02
NC node|link=02
ht reset -


coreboot-2.0.0-r_s2881_Fallback Thu Oct  1 17:07:49 MDT 2009 starting...
(0,1) link=00
(1,0) link=00
02 nodes initialized.
core0 started:  01
started ap apicid:
SBLink=02
NC node|link=02
Ram1.00
Ram1.01
Ram2.00
RAM end at 0x00100000 kB
Ram2.01
RAM end at 0x00200000 kB
Ram3
Initializing memory:  done
Initializing memory:  done
Ram4
v_esp=000cfe38
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now
Clearing initial memory region: Done
Jumping to image.
Check fallback/payload
Check fallback/coreboot_ram
Stage: load fallback/coreboot_ram @ 16384/245760 bytes, enter @ 4000
Stage: done loading.
Jumping to image.
coreboot-2.0.0-r_s2881_Fallback Thu Oct  1 17:07:49 MDT 2009 booting...
Enumerating buses...
Show all devs...Before Device Enumeration.
Root Device: enabled 1, 0 resources
APIC_CLUSTER: 0: enabled 1, 0 resources
APIC: 00: enabled 1, 0 resources
PCI_DOMAIN: 0000: enabled 1, 0 resources
PCI: 00:18.0: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:09.0: enabled 1, 0 resources
PCI: 00:09.1: enabled 1, 0 resources
PCI: 00:0a.0: enabled 1, 0 resources
PCI: 00:0a.1: enabled 1, 0 resources
PCI: 00:00.1: enabled 1, 0 resources
PCI: 00:01.0: enabled 1, 0 resources
PCI: 00:01.1: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:00.1: enabled 1, 0 resources
PCI: 00:00.2: enabled 0, 0 resources
PCI: 00:01.0: enabled 0, 0 resources
PCI: 00:05.0: enabled 1, 0 resources
PCI: 00:06.0: enabled 1, 0 resources
PCI: 00:01.0: enabled 1, 0 resources
PNP: 002e.0: enabled 1, 3 resources
PNP: 002e.1: enabled 0, 2 resources
PNP: 002e.2: enabled 1, 2 resources
PNP: 002e.3: enabled 0, 2 resources
PNP: 002e.5: enabled 1, 4 resources
PNP: 002e.6: enabled 0, 1 resources
PNP: 002e.7: enabled 0, 3 resources
PNP: 002e.8: enabled 0, 0 resources
PNP: 002e.9: enabled 0, 0 resources
PNP: 002e.a: enabled 0, 0 resources
PNP: 002e.b: enabled 1, 2 resources
PCI: 00:01.1: enabled 1, 0 resources
PCI: 00:01.2: enabled 1, 0 resources
PCI: 00:01.3: enabled 1, 0 resources
I2C: 00:50: enabled 1, 0 resources
I2C: 00:51: enabled 1, 0 resources
I2C: 00:52: enabled 1, 0 resources
I2C: 00:53: enabled 1, 0 resources
I2C: 00:54: enabled 1, 0 resources
I2C: 00:55: enabled 1, 0 resources
I2C: 00:56: enabled 1, 0 resources
I2C: 00:57: enabled 1, 0 resources
I2C: 00:2d: enabled 1, 0 resources
I2C: 00:2a: enabled 1, 0 resources
I2C: 00:49: enabled 1, 0 resources
I2C: 00:4a: enabled 1, 0 resources
PCI: 00:01.5: enabled 0, 0 resources
PCI: 00:01.6: enabled 0, 0 resources
PCI: 00:18.1: enabled 1, 0 resources
PCI: 00:18.2: enabled 1, 0 resources
PCI: 00:18.3: enabled 1, 0 resources
Compare with tree...
Root Device: enabled 1, 0 resources
 APIC_CLUSTER: 0: enabled 1, 0 resources
  APIC: 00: enabled 1, 0 resources
 PCI_DOMAIN: 0000: enabled 1, 0 resources
  PCI: 00:18.0: enabled 1, 0 resources
   PCI: 00:00.0: enabled 1, 0 resources
    PCI: 00:09.0: enabled 1, 0 resources
    PCI: 00:09.1: enabled 1, 0 resources
    PCI: 00:0a.0: enabled 1, 0 resources
    PCI: 00:0a.1: enabled 1, 0 resources
   PCI: 00:00.1: enabled 1, 0 resources
   PCI: 00:01.0: enabled 1, 0 resources
   PCI: 00:01.1: enabled 1, 0 resources
   PCI: 00:00.0: enabled 1, 0 resources
    PCI: 00:00.0: enabled 1, 0 resources
    PCI: 00:00.1: enabled 1, 0 resources
    PCI: 00:00.2: enabled 0, 0 resources
    PCI: 00:01.0: enabled 0, 0 resources
    PCI: 00:05.0: enabled 1, 0 resources
    PCI: 00:06.0: enabled 1, 0 resources
   PCI: 00:01.0: enabled 1, 0 resources
    PNP: 002e.0: enabled 1, 3 resources
    PNP: 002e.1: enabled 0, 2 resources
    PNP: 002e.2: enabled 1, 2 resources
    PNP: 002e.3: enabled 0, 2 resources
    PNP: 002e.5: enabled 1, 4 resources
    PNP: 002e.6: enabled 0, 1 resources
    PNP: 002e.7: enabled 0, 3 resources
    PNP: 002e.8: enabled 0, 0 resources
    PNP: 002e.9: enabled 0, 0 resources
    PNP: 002e.a: enabled 0, 0 resources
    PNP: 002e.b: enabled 1, 2 resources
   PCI: 00:01.1: enabled 1, 0 resources
   PCI: 00:01.2: enabled 1, 0 resources
   PCI: 00:01.3: enabled 1, 0 resources
    I2C: 00:50: enabled 1, 0 resources
    I2C: 00:51: enabled 1, 0 resources
    I2C: 00:52: enabled 1, 0 resources
    I2C: 00:53: enabled 1, 0 resources
    I2C: 00:54: enabled 1, 0 resources
    I2C: 00:55: enabled 1, 0 resources
    I2C: 00:56: enabled 1, 0 resources
    I2C: 00:57: enabled 1, 0 resources
    I2C: 00:2d: enabled 1, 0 resources
    I2C: 00:2a: enabled 1, 0 resources
    I2C: 00:49: enabled 1, 0 resources
    I2C: 00:4a: enabled 1, 0 resources
   PCI: 00:01.5: enabled 0, 0 resources
   PCI: 00:01.6: enabled 0, 0 resources
  PCI: 00:18.1: enabled 1, 0 resources
  PCI: 00:18.2: enabled 1, 0 resources
  PCI: 00:18.3: enabled 1, 0 resources
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
  PCI: 00:18.3 siblings=0
CPU: APIC: 00 enabled
PCI: 00:19.0 [1022/1100] enabled
PCI: 00:19.1 [1022/1101] enabled
PCI: 00:19.2 [1022/1102] enabled
PCI: 00:19.3 [1022/1103] enabled
  PCI: 00:19.3 siblings=0
CPU: APIC: 01 enabled
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] enabled
PCI: 00:19.0 [1022/1100] enabled
PCI: 00:19.1 [1022/1101] enabled
PCI: 00:19.2 [1022/1102] enabled
PCI: 00:19.3 [1022/1103] enabled

I don't see 14e4/1648 above.  Is that the problem?  Any suggestions?  
Thanks.

-- 
Hugh Greenberg
Los Alamos National Laboratory, CCS-1
Email: hng at lanl.gov
Phone: (505) 665-6471



Myles Watson wrote:
> On Thu, Oct 1, 2009 at 8:54 AM, Hugh Greenberg <hng at lanl.gov> wrote:
>   
>> I am trying to put coreboot v2 on a tyan s2881 and I would like to use
>> seabios and gpxe for the payload .  I successfully created the coreboot.rom
>> by following the s2881 build tutorial and seabios tutorial.  I then tried to
>> add gpxe to the coreboot rom and I received this output from cbfstool:
>>
>> $./cbfstool ../../targets/tyan/s2881/s2881/coreboot.rom add
>> ../../../gpxe-0.9.6-tg3-5704.rom pci14e4,1648 99
>> Could not add the file to CBFS, it's probably too big.
>>
>> $ ./cbfstool ../../targets/tyan/s2881/s2881/coreboot.rom print
>> ../../targets/tyan/s2881/s2881/coreboot.rom: 512 kB, bootblocksize 262144,
>> romsize 524288, offset 0x0
>> Alignment: 64 bytes
>>     
>
>   
>> Name                           Offset     Type         Size
>> normal/payload                 0x0        payload      65592
>> normal/coreboot_ram            0x10080    stage        56173
>> fallback/payload               0x1dc40    payload      65592
>> fallback/coreboot_ram          0x2dcc0    stage        55651
>>                              0x3b680    null         18744
>>     
> I didn't see how big the gpxe ROM is.  That might influence which of
> these choices you make.
>
> You could:
> 1. shrink your bootblock (CONFIG_ROM_IMAGE_SIZE)
> 2. do fallback-only (Remove anything that says normal in
> targets/tyan/s2881/s2881/Config.lb)
>
>   
>> I taked to Ron about this and he suggested to try the Kconfig build system
>> as that would create a smaller rom.   That failed and I received this
>> output:
>>     
>
> 3. Apply the attached patch (updated version of one that is waiting to
> be reviewed.)
>
> Thanks,
> Myles
>

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