[coreboot] [v2] r4732 - in trunk/coreboot-v2/src: cpu/amd cpu/amd/socket_754 mainboard/gigabyte/m57sli mainboard/msi mainboard/msi/ms7135 mainboard/msi/ms7260 mainboard/msi/ms9185 mainboard/msi/ms9282 mainboard/supermicro/h8dme
svn at coreboot.org
svn at coreboot.org
Wed Oct 7 17:30:58 CEST 2009
Author: oxygene
Date: 2009-10-07 17:30:58 +0200 (Wed, 07 Oct 2009)
New Revision: 4732
Added:
trunk/coreboot-v2/src/cpu/amd/socket_754/Kconfig
trunk/coreboot-v2/src/cpu/amd/socket_754/Makefile.inc
trunk/coreboot-v2/src/mainboard/msi/ms7135/Kconfig
trunk/coreboot-v2/src/mainboard/msi/ms7135/Makefile.inc
trunk/coreboot-v2/src/mainboard/msi/ms7260/Kconfig
trunk/coreboot-v2/src/mainboard/msi/ms7260/Makefile.inc
trunk/coreboot-v2/src/mainboard/msi/ms9185/Kconfig
trunk/coreboot-v2/src/mainboard/msi/ms9185/Makefile.inc
trunk/coreboot-v2/src/mainboard/msi/ms9282/Kconfig
trunk/coreboot-v2/src/mainboard/msi/ms9282/Makefile.inc
Modified:
trunk/coreboot-v2/src/cpu/amd/Kconfig
trunk/coreboot-v2/src/cpu/amd/Makefile.inc
trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Makefile.inc
trunk/coreboot-v2/src/mainboard/msi/Kconfig
trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Makefile.inc
Log:
Kconfig:
- Add AMD Socket 754,
- Fix MCP55 boards (romstrap)
- Implement remaining MSI boards
Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
Acked-by: Myles Watson <mylesgw at gmail.com>
Modified: trunk/coreboot-v2/src/cpu/amd/Kconfig
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/Kconfig 2009-10-07 14:36:16 UTC (rev 4731)
+++ trunk/coreboot-v2/src/cpu/amd/Kconfig 2009-10-07 15:30:58 UTC (rev 4732)
@@ -2,7 +2,7 @@
bool
default n
-#source src/cpu/amd/socket_754/Kconfig
+source src/cpu/amd/socket_754/Kconfig
#source src/cpu/amd/socket_939/Kconfig
source src/cpu/amd/socket_940/Kconfig
source src/cpu/amd/socket_AM2/Kconfig
Modified: trunk/coreboot-v2/src/cpu/amd/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/Makefile.inc 2009-10-07 14:36:16 UTC (rev 4731)
+++ trunk/coreboot-v2/src/cpu/amd/Makefile.inc 2009-10-07 15:30:58 UTC (rev 4732)
@@ -1,4 +1,5 @@
subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F
+subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754
subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940
subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += socket_AM2
subdirs-$(CONFIG_CPU_AMD_GX1) += model_gx1
Added: trunk/coreboot-v2/src/cpu/amd/socket_754/Kconfig
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/socket_754/Kconfig (rev 0)
+++ trunk/coreboot-v2/src/cpu/amd/socket_754/Kconfig 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,9 @@
+config CPU_AMD_SOCKET_754
+ bool
+ default n
+ select CPU_AMD_MODEL_FXX
+
+config CPU_SOCKET_TYPE
+ hex
+ default 0x10
+ depends on CPU_AMD_SOCKET_754
Added: trunk/coreboot-v2/src/cpu/amd/socket_754/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/socket_754/Makefile.inc (rev 0)
+++ trunk/coreboot-v2/src/cpu/amd/socket_754/Makefile.inc 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,14 @@
+obj-y += socket_754.o
+subdirs-y += ../model_fxx
+subdirs-y += ../dualcore
+subdirs-y += ../mtrr
+subdirs-y += ../microcode
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/pae
Modified: trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Makefile.inc 2009-10-07 14:36:16 UTC (rev 4731)
+++ trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Makefile.inc 2009-10-07 15:30:58 UTC (rev 4732)
@@ -36,14 +36,16 @@
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
-crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
crt0-y += auto.inc
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
-ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
Modified: trunk/coreboot-v2/src/mainboard/msi/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/Kconfig 2009-10-07 14:36:16 UTC (rev 4731)
+++ trunk/coreboot-v2/src/mainboard/msi/Kconfig 2009-10-07 15:30:58 UTC (rev 4732)
@@ -25,6 +25,10 @@
source "src/mainboard/msi/ms6119/Kconfig"
source "src/mainboard/msi/ms6147/Kconfig"
source "src/mainboard/msi/ms6178/Kconfig"
+source "src/mainboard/msi/ms7135/Kconfig"
+source "src/mainboard/msi/ms7260/Kconfig"
+source "src/mainboard/msi/ms9185/Kconfig"
+source "src/mainboard/msi/ms9282/Kconfig"
endchoice
Added: trunk/coreboot-v2/src/mainboard/msi/ms7135/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms7135/Kconfig (rev 0)
+++ trunk/coreboot-v2/src/mainboard/msi/ms7135/Kconfig 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,137 @@
+config BOARD_MSI_MS7135
+ bool "MS7135"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_754
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_NVIDIA_CK804
+ select SUPERIO_WINBOND_W83627THF
+ select PIRQ_TABLE
+ select USE_DCACHE_RAM
+ select USE_PRINTK_IN_CAR
+
+config MAINBOARD_DIR
+ string
+ default msi/ms7135
+ depends on BOARD_MSI_MS7135
+
+config APIC_ID_OFFSET
+ hex
+ default 0x10
+ depends on BOARD_MSI_MS7135
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_MSI_MS7135
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_MSI_MS7135
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_MSI_MS7135
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "ms7135"
+ depends on BOARD_MSI_MS7135
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2895
+ depends on BOARD_MSI_MS7135
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_MSI_MS7135
+
+config MEM_TRAIN_SEQ
+ bool
+ default n
+ depends on BOARD_MSI_MS7135
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_MSI_MS7135
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_MSI_MS7135
+
+config MEM_TRAIN_SEQ
+ bool
+ default n
+ depends on BOARD_MSI_MS7135
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_MSI_MS7135
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_MSI_MS7135
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0
+ depends on BOARD_MSI_MS7135
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x20
+ depends on BOARD_MSI_MS7135
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS7135
+
+config SERIAL_CPU_INIT
+ bool
+ default y
+ depends on BOARD_MSI_MS7135
+
+config AP_CODE_IN_CAR
+ bool
+ default y
+ depends on BOARD_MSI_MS7135
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS7135
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_MSI_MS7135
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default n
+ depends on BOARD_MSI_MS7135
+
+config IRQ_SLOT_COUNT
+ int
+ default 13
+ depends on BOARD_MSI_MS7135
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xcf000
+ depends on BOARD_MSI_MS7135
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x1000
+ depends on BOARD_MSI_MS7135
Added: trunk/coreboot-v2/src/mainboard/msi/ms7135/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms7135/Makefile.inc (rev 0)
+++ trunk/coreboot-v2/src/mainboard/msi/ms7135/Makefile.inc 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1 @@
+include $(src)/mainboard/tyan/Makefile.s289x.inc
Added: trunk/coreboot-v2/src/mainboard/msi/ms7260/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms7260/Kconfig (rev 0)
+++ trunk/coreboot-v2/src/mainboard/msi/ms7260/Kconfig 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,148 @@
+config BOARD_MSI_MS7260
+ bool "MS7260"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_AM2
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_NVIDIA_MCP55
+ select SUPERIO_WINBOND_W83627EHG
+ select PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select HAVE_HIGH_TABLES
+ select IOAPIC
+ select MEM_TRAIN_SEQ
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select K8_REV_F_SUPPORT
+
+config MAINBOARD_DIR
+ string
+ default msi/ms7260
+ depends on BOARD_MSI_MS7260
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_MSI_MS7260
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_MSI_MS7260
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_MSI_MS7260
+
+config APIC_ID_OFFSET
+ hex
+ default 16
+ depends on BOARD_MSI_MS7260
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_MSI_MS7260
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_MSI_MS7260
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_MSI_MS7260
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_MSI_MS7260
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "ms7260"
+ depends on BOARD_MSI_MS7260
+
+config PCI_64BIT_PREF_MEM
+ bool
+ default n
+ depends on BOARD_MSI_MS7260
+
+config HAVE_FALLBACK_BOOT
+ bool
+ default n
+ depends on BOARD_MSI_MS7260
+
+config USE_FALLBACK_IMAGE
+ bool
+ default n
+ depends on BOARD_MSI_MS7260
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_MSI_MS7260
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_MSI_MS7260
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_MSI_MS7260
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_MSI_MS7260
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_MSI_MS7260
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_MSI_MS7260
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_MSI_MS7260
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS7260
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS7260
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS7260
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1462
+ depends on BOARD_MSI_MS7260
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x7260
+ depends on BOARD_MSI_MS7260
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_MSI_MS7260
Added: trunk/coreboot-v2/src/mainboard/msi/ms7260/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms7260/Makefile.inc (rev 0)
+++ trunk/coreboot-v2/src/mainboard/msi/ms7260/Makefile.inc 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,64 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+#needed by irq_tables and mptable and acpi_tables
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
+
+# This is part of the conversion to init-obj and away from included code.
+initobj-y += crt0.o
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ mv $(obj)/dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
Added: trunk/coreboot-v2/src/mainboard/msi/ms9185/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms9185/Kconfig (rev 0)
+++ trunk/coreboot-v2/src/mainboard/msi/ms9185/Kconfig 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,123 @@
+config BOARD_MSI_MS9185
+ bool "MS9185"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_F
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_BROADCOM_BCM5780
+ select SOUTHBRIDGE_BROADCOM_BCM5785
+ select SUPERIO_NSC_PC87417
+ select HAVE_PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+
+config MAINBOARD_DIR
+ string
+ default msi/ms9185
+ depends on BOARD_MSI_MS9185
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xcc000
+ depends on BOARD_MSI_MS9185
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x04000
+ depends on BOARD_MSI_MS9185
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_MSI_MS9185
+
+config APIC_ID_OFFSET
+ hex
+ default 0x10
+ depends on BOARD_MSI_MS9185
+
+config HAVE_HARD_RESET
+ bool
+ default y
+ depends on BOARD_MSI_MS9185
+
+config IOAPIC
+ bool
+ default y
+ depends on BOARD_MSI_MS9185
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_MSI_MS9185
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default n
+ depends on BOARD_MSI_MS9185
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_MSI_MS9185
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_MSI_MS9185
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "ultra40"
+ depends on BOARD_MSI_MS9185
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_MSI_MS9185
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_MSI_MS9185
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_MSI_MS9185
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_MSI_MS9185
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_MSI_MS9185
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS9185
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_MSI_MS9185
+
+config CONSOLE_VGA
+ bool
+ default y
+ depends on BOARD_MSI_MS9185
+
+config PCI_ROM_RUN
+ bool
+ default y
+ depends on BOARD_MSI_MS9185
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_MSI_MS9185
Added: trunk/coreboot-v2/src/mainboard/msi/ms9185/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms9185/Makefile.inc (rev 0)
+++ trunk/coreboot-v2/src/mainboard/msi/ms9185/Makefile.inc 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,33 @@
+driver-y += mainboard.o
+
+# Needed by irq_tables and mptable and acpi_tables.
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
Added: trunk/coreboot-v2/src/mainboard/msi/ms9282/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms9282/Kconfig (rev 0)
+++ trunk/coreboot-v2/src/mainboard/msi/ms9282/Kconfig 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,148 @@
+config BOARD_MSI_MS9282
+ bool "MS9282"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_F
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_NVIDIA_MCP55
+ select SUPERIO_WINBOND_W83627EHG
+ select PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select HAVE_HIGH_TABLES
+ select IOAPIC
+ select MEM_TRAIN_SEQ
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select K8_REV_F_SUPPORT
+
+config MAINBOARD_DIR
+ string
+ default msi/ms9282
+ depends on BOARD_MSI_MS9282
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xcc000
+ depends on BOARD_MSI_MS9282
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x04000
+ depends on BOARD_MSI_MS9282
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_MSI_MS9282
+
+config APIC_ID_OFFSET
+ hex
+ default 16
+ depends on BOARD_MSI_MS9282
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_MSI_MS9282
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_MSI_MS9282
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_MSI_MS9282
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_MSI_MS9282
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "ms9282"
+ depends on BOARD_MSI_MS9282
+
+config PCI_64BIT_PREF_MEM
+ bool
+ default n
+ depends on BOARD_MSI_MS9282
+
+config HAVE_FALLBACK_BOOT
+ bool
+ default n
+ depends on BOARD_MSI_MS9282
+
+config USE_FALLBACK_IMAGE
+ bool
+ default n
+ depends on BOARD_MSI_MS9282
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_MSI_MS9282
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_MSI_MS9282
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_MSI_MS9282
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_MSI_MS9282
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_MSI_MS9282
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_MSI_MS9282
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_MSI_MS9282
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS9282
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS9282
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_MSI_MS9282
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1462
+ depends on BOARD_MSI_MS9282
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x9282
+ depends on BOARD_MSI_MS9282
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_MSI_MS9282
Added: trunk/coreboot-v2/src/mainboard/msi/ms9282/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/msi/ms9282/Makefile.inc (rev 0)
+++ trunk/coreboot-v2/src/mainboard/msi/ms9282/Makefile.inc 2009-10-07 15:30:58 UTC (rev 4732)
@@ -0,0 +1,66 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+driver-y += ../../../drivers/i2c/i2cmux2/i2cmux2.o
+driver-y += ../../../drivers/i2c/adm1027/adm1027.o
+
+#needed by irq_tables and mptable and acpi_tables
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
+
+# This is part of the conversion to init-obj and away from included code.
+initobj-y += crt0.o
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ mv $(obj)/dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Makefile.inc
===================================================================
--- trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Makefile.inc 2009-10-07 14:36:16 UTC (rev 4731)
+++ trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Makefile.inc 2009-10-07 15:30:58 UTC (rev 4732)
@@ -34,14 +34,16 @@
crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
-crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
crt0-y += auto.inc
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
-ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
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