[coreboot] unstable AMD Fam10h boot

[Stefan Reinauer]

Ward Vandewege wrote:
> On Sat, Sep 05, 2009 at 10:46:57AM -0700, ron minnich wrote:
>   
>> On Sat, Sep 5, 2009 at 10:36 AM, Stefan Reinauer<stepan at coresystems.de> wrote:
>>
>>     
>>> Another idea would be to get rid of SMP setup in CAR stage. It sounds
>>> highly funky to me anyways.
>>>
>>> - Why are we doing this anyways?
>>>   o Is there a reason?
>>>   o No other SMP system except K10 does this.
>>>
>>> * How many ms do we benefit from that? (Honest question). Any at all?
>>>       
>> This may fix one problem, but it does not fix the general problem:
>> using cf8/cfc is not going to be safe on multiple cores, from my
>> understanding.
>>     
>
> Not to complicate matters even further, but since we are talking about
> locking - will any of this improve the 'many cores talking to serial at once'
> problem?
>
>   
Yes, going non-parallel in CAR would. Finding a way to do locking via a
(memory mapped) chipset register, would make it possible to fix that,
too. With a lot of work. Just going MMCONF would not fix the printk thing.