[coreboot] [v2] r4655 - in trunk/coreboot-v2/src: . console cpu cpu/x86 mainboard mainboard/amd/rumba mainboard/amd/serengeti_cheetah northbridge/intel/i82810
svn at coreboot.org
svn at coreboot.org
Tue Sep 22 20:49:08 CEST 2009
Author: myles
Date: 2009-09-22 20:49:08 +0200 (Tue, 22 Sep 2009)
New Revision: 4655
Modified:
trunk/coreboot-v2/src/Kconfig
trunk/coreboot-v2/src/console/Kconfig
trunk/coreboot-v2/src/cpu/Kconfig
trunk/coreboot-v2/src/cpu/x86/Kconfig
trunk/coreboot-v2/src/mainboard/Kconfig
trunk/coreboot-v2/src/mainboard/amd/rumba/Kconfig
trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig
trunk/coreboot-v2/src/northbridge/intel/i82810/Kconfig
Log:
tables.diff: Add Kconfig dialogues for ACPI, MP_TABLE, ...
Kconfig_bools.diff: Change some more ints to bools, change some default values.
xip_size.diff: Make XIP_SIZE + XIP_BASE add up to 4GB.
smp.diff: set CONFIG_SMP based on MAX_CPUS.
Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>
Modified: trunk/coreboot-v2/src/Kconfig
===================================================================
--- trunk/coreboot-v2/src/Kconfig 2009-09-22 15:58:19 UTC (rev 4654)
+++ trunk/coreboot-v2/src/Kconfig 2009-09-22 18:49:08 UTC (rev 4655)
@@ -40,14 +40,10 @@
bool
default y
-config HAVE_HIGH_TABLES
+config PCI_BUS_SEGN_BITS
bool
- default y
+ default n
-config PCI_BUS_SEGN_BITS
- int
- default 0
-
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
default 0
@@ -81,20 +77,20 @@
default 126
config LOGICAL_CPUS
- int
- default 1
+ bool
+ default y
config PCI_ROM_RUN
bool
default n
config HT_CHAIN_UNITID_BASE
- int
+ hex
default 1
config HT_CHAIN_END_UNITID_BASE
- int
- default 32
+ hex
+ default 0x20
config HEAP_SIZE
hex
@@ -136,10 +132,6 @@
int
default 2048
-config MULTIBOOT
- bool
- default n
-
config COMPRESSED_PAYLOAD_LZMA
bool
default y
@@ -158,10 +150,6 @@
int
default 0
-config HAVE_ACPI_TABLES
- bool
- default n
-
config HAVE_FALLBACK_BOOT
bool
default y
@@ -186,18 +174,10 @@
bool
default y
-config HAVE_MP_TABLE
- bool
- default n
-
config HAVE_OPTION_TABLE
bool
default y
-config HAVE_PIRQ_TABLE
- bool
- default n
-
config PIRQ_ROUTE
bool
default n
@@ -214,11 +194,55 @@
bool
default n
+config USE_WATCHDOG_ON_BOOT
+ bool
+ default n
+
+config VGA
+ bool
+ default n
+ help
+ Build board-specific VGA code.
+
+config GFXUMA
+ bool
+ default n
+ help
+ Enable Unified Memory Architecture for graphics.
+
# TODO
# menu "Drivers"
#
# endmenu
+menu "Generated System Tables"
+
+config HAVE_LOW_TABLES
+ bool
+ default y
+
+config HAVE_HIGH_TABLES
+ bool "Write 'high' tables to avoid being overwritten in F segment"
+ default y
+
+config MULTIBOOT
+ bool "Add Multiboot tables (for grub2)"
+ default n
+
+config HAVE_ACPI_TABLES
+ bool "Generate ACPI tables"
+ default n
+
+config HAVE_MP_TABLE
+ bool "Generate an MP table"
+ default n
+
+config HAVE_PIRQ_TABLE
+ bool "Generate a PIRQ table"
+ default n
+
+endmenu
+
menu "Payload"
config COMPRESSED_PAYLOAD_LZMA
Modified: trunk/coreboot-v2/src/console/Kconfig
===================================================================
--- trunk/coreboot-v2/src/console/Kconfig 2009-09-22 15:58:19 UTC (rev 4654)
+++ trunk/coreboot-v2/src/console/Kconfig 2009-09-22 18:49:08 UTC (rev 4655)
@@ -32,6 +32,12 @@
bool "Use VGA console, once initialized."
default n
+config CONSOLE_VGA_ONBOARD_AT_FIRST
+ bool "Use onboard VGA as primary"
+ default n
+ help
+ If not selected, the last adapter found will be used.
+
config MAXIMUM_CONSOLE_LOGLEVEL
int "Maximum console loglevel"
default 9
Modified: trunk/coreboot-v2/src/cpu/Kconfig
===================================================================
--- trunk/coreboot-v2/src/cpu/Kconfig 2009-09-22 15:58:19 UTC (rev 4654)
+++ trunk/coreboot-v2/src/cpu/Kconfig 2009-09-22 18:49:08 UTC (rev 4655)
@@ -19,7 +19,7 @@
config SMP
bool
- default n
+ default y if MAX_CPUS != 1
config CPU_SOCKET_TYPE
hex
Modified: trunk/coreboot-v2/src/cpu/x86/Kconfig
===================================================================
--- trunk/coreboot-v2/src/cpu/x86/Kconfig 2009-09-22 15:58:19 UTC (rev 4654)
+++ trunk/coreboot-v2/src/cpu/x86/Kconfig 2009-09-22 18:49:08 UTC (rev 4655)
@@ -16,4 +16,4 @@
config XIP_ROM_SIZE
hex
- default 0x2000
+ default 0x20000
Modified: trunk/coreboot-v2/src/mainboard/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/Kconfig 2009-09-22 15:58:19 UTC (rev 4654)
+++ trunk/coreboot-v2/src/mainboard/Kconfig 2009-09-22 18:49:08 UTC (rev 4655)
@@ -331,6 +331,11 @@
default "Tyan"
depends on VENDOR_TYAN
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x10f1
+ depends on VENDOR_TYAN
+
config MAINBOARD_VENDOR
string
default "VIA"
Modified: trunk/coreboot-v2/src/mainboard/amd/rumba/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/rumba/Kconfig 2009-09-22 15:58:19 UTC (rev 4654)
+++ trunk/coreboot-v2/src/mainboard/amd/rumba/Kconfig 2009-09-22 18:49:08 UTC (rev 4655)
@@ -52,6 +52,6 @@
depends on BOARD_AMD_RUMBA
config USE_INIT
- int
- default 0
+ bool
+ default n
depends on BOARD_AMD_RUMBA
Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig 2009-09-22 15:58:19 UTC (rev 4654)
+++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Kconfig 2009-09-22 18:49:08 UTC (rev 4655)
@@ -69,30 +69,24 @@
default "Serengeti-Cheetah"
depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config USE_FAILOVER_IMAGE
- int
- default 0
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
depends on BOARD_AMD_SERENGETI_CHEETAH
config MEM_TRAIN_SEQ
- int
- default 1
+ bool
+ default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config HAVE_FAILOVER_BOOT
- int
- default 0
+ bool
+ default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config USE_FAILOVER_IMAGE
- int
- default 0
+ bool
+ default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config MAX_CPUS
@@ -106,28 +100,28 @@
depends on BOARD_AMD_SERENGETI_CHEETAH
config MEM_TRAIN_SEQ
- int
- default 1
+ bool
+ default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config AP_CODE_IN_CAR
- int
- default 1
+ bool
+ default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config HW_MEM_HOLE_SIZE_AUTO_INC
- int
- default 0
+ bool
+ default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config HT_CHAIN_END_UNITID_BASE
- int
+ hex
default 0x6
depends on BOARD_AMD_SERENGETI_CHEETAH
config USE_INIT
- int
- default 0
+ bool
+ default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config SERIAL_CPU_INIT
@@ -136,13 +130,13 @@
depends on BOARD_AMD_SERENGETI_CHEETAH
config AP_CODE_IN_CAR
- int
- default 1
+ bool
+ default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config WAIT_BEFORE_CPUS_INIT
- int
- default 1
+ bool
+ default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config SB_HT_CHAIN_ON_BUS0
Modified: trunk/coreboot-v2/src/northbridge/intel/i82810/Kconfig
===================================================================
--- trunk/coreboot-v2/src/northbridge/intel/i82810/Kconfig 2009-09-22 15:58:19 UTC (rev 4654)
+++ trunk/coreboot-v2/src/northbridge/intel/i82810/Kconfig 2009-09-22 18:49:08 UTC (rev 4655)
@@ -18,11 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-config HAVE_HIGH_TABLES
- bool "Do we have high tables"
- default y
-
config NORTHBRIDGE_INTEL_I82810
bool
default n
-
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