[coreboot] [PATCH] Enable maximum decoded range for VT8237*
Rudolf Marek
r.marek at assembler.cz
Thu Apr 22 23:04:44 CEST 2010
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
Following code does work:
static void bootblock_southbridge_init(void) {
/* ROM decode last 8MB FF800000 - FFFFFFFF on VT8237S/VT8237A */
/* ROM decode last 4MB FFC00000 - FFFFFFFF on VT8237R */
device_t dev;
/* Power management controller */
//dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
// PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
//if (dev == PCI_DEV_INVALID) {
/* Power management controller */
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
//}
if (dev == PCI_DEV_INVALID)
return;
pci_write_config8(dev, 0x41, 0x7f);
}
If one uncomment the commented out parts. It stops working. Nothing is changed
if the if (dev == PCI_DEV_INVALID) return; is moved to the if or not.
Rudolf
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org
iEYEARECAAYFAkvQuesACgkQ3J9wPJqZRNUikwCglEm7Upbqg8SlTNnyUaRoKObi
IKgAoNaottXQGBnJaYsCRFRgTzkafhuV
=/HGI
-----END PGP SIGNATURE-----
More information about the coreboot
mailing list