[coreboot] Jetway J7F4K1G5S-LF acting weird, any suggestions?

[Corey Osgood]

Oh! Memtest would seem to be overwriting shared graphics memory (or
AGP, or VGA BIOS...). I'm going to be busy most of the day today, I'll
check it out tomorrow (unless someone else figures it out first).

-Corey

On Wed, Aug 4, 2010 at 2:15 PM,  <austinro at msu.edu> wrote:
> First, thank you all for your help, I wouldn't have known where to begin
> without it.
>
> Quoting Corey Osgood <corey.osgood at gmail.com>:
>> Please try the attached patch, and run memtest for a while (overnight
>> would probably be best), and let me/us know the results. If this seems
>> to correct the issue, then I'll work on a patch to initialize the
>> extra ranks.
>
> Okay, I applied the patch, the relevant output reads
>
> After reset status:
> 0040
> ranks = 01, this is not the
> problem
> DIMM 0050 OFFSET 001f
> I rebuilt coreboot and it is running memtest right now.  Here are a few
> pictures I took of the screen:
>
> Memtest starts...
> Memtest pauses for several minutes at 7%...
> Memtest gets to 17%...
> The screen goes crazy and coreboot reboots.
>
> Here is part of the serial log, showing the jump to the payload:
>
> ...
> Loaded
> segments
> Jumping to boot code at
> 10000
> POST:
> 0xfe
> entry    =
> 0x00010000
> lb_start =
> 0x00004000
> lb_size  =
> 0x00020000
> adjust   =
> 0x3dfdc000
> buffer   =
> 0x3dfb6314
> elf_boot_notes = 0x0001335c
> adjusted_boot_notes =
> 0x3dfef35c
>
>
> coreboot-4.0-r5682M Wed Aug  4 11:13:09 EDT 2010
> starting...
> In
> romstage.c:main()
>
> After reset status:
> 0040
> Waiting for SMBus to warm upDIMM 0050 OFFSET
> 0002
> After reset status:
> 0040
> Waiting until SMBus
> ready
> Waiting until SMBus
> ready
> Read:
> 0008
> After reset status:
> 0040
> .Done
>
> Enabling mainboard
> devices
> DIMM 0050 OFFSET
> 0005
> After reset status:
> 0040
> Waiting until SMBus
> ready
> Waiting until SMBus
> ready
> Read:
> 0000
> After reset status:
> 0040
> ranks = 01, this is not the
> problem
> DIMM 0050 OFFSET
> 001f
> After reset status:
> 0040
> Waiting until SMBus
> ready
> Waiting until SMBus
> ready
> Read:
> 0001
> After reset status:
> 0040
> Found 1024MB of
> ram
> DIMM 0050 OFFSET
> 0011
> After reset status:
> 0040
> Waiting until SMBus ready
> ...
> Notice that coreboot restarted in the middle.  The screen does not change
> now, it's holding the broken colored pattern.  It only restarted one time,
> which is at least different from the behavior with seabios or FILO, where it
> would keep restarting repeatedly.  The final tail of the serial output is
> this:
>
>
> ...
> Assigned: PCI: 00:0f.0 1c *  [0x24b4 - 0x24b7]
> io
> PCI_DOMAIN: 0000 allocate_resources_io: next_base: 24b8 size: 14b8 align: 8
> grae
> PCI_DOMAIN: 0000 allocate_resources_mem: base:feba0000 size:40500 align:17
> granf
> Assigned: PCI: 00:09.0 30 *  [0xfeba0000 - 0xfebbffff]
> mem
> Assigned: PCI: 00:0b.0 30 *  [0xfebc0000 - 0xfebdffff]
> mem
> Assigned: PCI: 00:09.0 14 *  [0xfebe0000 - 0xfebe00ff]
> mem
> Assigned: PCI: 00:0b.0 14 *  [0xfebe0100 - 0xfebe01ff]
> mem
> Assigned: PCI: 00:10.4 10 *  [0xfebe0200 - 0xfebe02ff]
> mem
> Assigned: PCI: 00:10.5 10 *  [0xfebe0300 - 0xfebe03ff]
> mem
> Assigned: PCI: 00:12.0 14 *  [0xfebe0400 - 0xfebe04ff]
> mem
> PCI_DOMAIN: 0000 allocate_resources_mem: next_base: febe0500 size: 40500
> align:e
> Root Device assign_resources, bus 0 link:
> 0
> Entering cn700
> pci_domain_set_resources.
> Entering
> find_pci_tolm
> Leaving
> find_pci_tolm
> tomk is
> 0x100000
> PCI_DOMAIN: 0000 assign_resources, bus 0 link:
> 0
> PCI: 00:09.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08
> io
> PCI: 00:09.0 14 <- [0x00febe0000 - 0x00febe00ff] size 0x00000100 gran 0x08
> mem
> PCI: 00:09.0 30 <- [0x00feba0000 - 0x00febbffff] size 0x00020000 gran 0x11
> romem
> PCI: 00:0b.0 10 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08
> io
> PCI: 00:0b.0 14 <- [0x00febe0100 - 0x00febe01ff] size 0x00000100 gran 0x08
> mem
> PCI: 00:0b.0 30 <- [0x00febc0000 - 0x00febdffff] size 0x00020000 gran 0x11
> romem
> PCI: 00:0f.0 10 <- [0x00000024a0 - 0x00000024a7] size 0x00000008 gran 0x03
> io
> PCI: 00:0f.0 14 <- [0x00000024b0 - 0x00000024b3] size 0x00000004 gran 0x02
> io
> PCI: 00:0f.0 18 <- [0x00000024a8 - 0x00000024af] size 0x00000008 gran 0x03
> io
> PCI: 00:0f.0 1c <- [0x00000024b4 - 0x00000024b7] size 0x00000004 gran 0x02
> io
> PCI: 00:0f.0 20 <- [0x0000002480 - 0x000000248f] size 0x00000010 gran 0x04
> io
> PCI: 00:0f.0 24 <- [0x0000001800 - 0x00000018ff] size 0x00000100 gran 0x08
> io
> PCI: 00:0f.1 20 <- [0x0000002490 - 0x000000249f] size 0x00000010 gran 0x04
> io
> PCI: 00:10.0 20 <- [0x0000002400 - 0x000000241f] size 0x00000020 gran 0x05
> io
> PCI: 00:10.1 20 <- [0x0000002420 - 0x000000243f] size 0x00000020 gran 0x05
> io
> PCI: 00:10.2 20 <- [0x0000002440 - 0x000000245f] size 0x00000020 gran 0x05
> io
> PCI: 00:10.3 20 <- [0x0000002460 - 0x000000247f] size 0x00000020 gran 0x05
> io
> PCI: 00:10.4 10 <- [0x00febe0200 - 0x00febe02ff] size 0x00000100 gran 0x08
> mem
> PCI: 00:10.5 10 <- [0x00febe0300 - 0x00febe03ff] size 0x00000100 gran 0x08
> mem
> PCI: 00:11.0 assign_resources, bus 0 link: 0
> I'm attaching the whole log, also.
>
>
>
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