[coreboot] [commit] r5163 - in trunk/src: mainboard/digitallogic/adl855pc northbridge/intel northbridge/intel/i855 northbridge/intel/i855gme northbridge/intel/i855pm
repository service
svn at coreboot.org
Thu Feb 25 19:23:23 CET 2010
Author: stepan
Date: Thu Feb 25 19:23:23 2010
New Revision: 5163
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5163
Log:
Drop i855pm port and rename i855gme to i855 instead.
This patch also changes the digitallogic/adl855pc to use that port.
It probably won't work, but at least we will get an error if something
breaks compilation of the i855 code that is there.
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>
Added:
trunk/src/northbridge/intel/i855/
- copied from r5162, trunk/src/northbridge/intel/i855gme/
Deleted:
trunk/src/northbridge/intel/i855gme/
trunk/src/northbridge/intel/i855pm/
Modified:
trunk/src/mainboard/digitallogic/adl855pc/Kconfig
trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb
trunk/src/mainboard/digitallogic/adl855pc/romstage.c
trunk/src/northbridge/intel/Kconfig
trunk/src/northbridge/intel/Makefile.inc
trunk/src/northbridge/intel/i855/Kconfig
trunk/src/northbridge/intel/i855/chip.h
trunk/src/northbridge/intel/i855/northbridge.c
Modified: trunk/src/mainboard/digitallogic/adl855pc/Kconfig
==============================================================================
--- trunk/src/mainboard/digitallogic/adl855pc/Kconfig Thu Feb 25 18:03:17 2010 (r5162)
+++ trunk/src/mainboard/digitallogic/adl855pc/Kconfig Thu Feb 25 19:23:23 2010 (r5163)
@@ -2,7 +2,7 @@
bool "smartModule855"
select ARCH_X86
select CPU_INTEL_SOCKET_MPGA479M
- select NORTHBRIDGE_INTEL_I855PM
+ select NORTHBRIDGE_INTEL_I855
select SOUTHBRIDGE_INTEL_I82801DBM
select SUPERIO_WINBOND_W83627HF
select ROMCC
Modified: trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb
==============================================================================
--- trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb Thu Feb 25 18:03:17 2010 (r5162)
+++ trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb Thu Feb 25 19:23:23 2010 (r5163)
@@ -1,4 +1,4 @@
-chip northbridge/intel/i855pm
+chip northbridge/intel/i855
device pci_domain 0 on
device pci 0.0 on end
device pci 1.0 on end
Modified: trunk/src/mainboard/digitallogic/adl855pc/romstage.c
==============================================================================
--- trunk/src/mainboard/digitallogic/adl855pc/romstage.c Thu Feb 25 18:03:17 2010 (r5162)
+++ trunk/src/mainboard/digitallogic/adl855pc/romstage.c Thu Feb 25 19:23:23 2010 (r5163)
@@ -17,7 +17,7 @@
#include "arch/i386/lib/console.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801dbm/i82801dbm_early_smbus.c"
-#include "northbridge/intel/i855pm/raminit.h"
+#include "northbridge/intel/i855/raminit.h"
#if 0
#include "cpu/p6/apic_timer.c"
@@ -25,7 +25,7 @@
#endif
#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/i855pm/debug.c"
+#include "northbridge/intel/i855/debug.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"
@@ -57,8 +57,8 @@
return smbus_read_byte(device, address);
}
-#include "northbridge/intel/i855pm/raminit.c"
-#include "northbridge/intel/i855pm/reset_test.c"
+#include "northbridge/intel/i855/raminit.c"
+#include "northbridge/intel/i855/reset_test.c"
#include "lib/generic_sdram.c"
static void main(unsigned long bist)
Modified: trunk/src/northbridge/intel/Kconfig
==============================================================================
--- trunk/src/northbridge/intel/Kconfig Thu Feb 25 18:03:17 2010 (r5162)
+++ trunk/src/northbridge/intel/Kconfig Thu Feb 25 19:23:23 2010 (r5163)
@@ -6,6 +6,5 @@
source src/northbridge/intel/i440lx/Kconfig
source src/northbridge/intel/i82810/Kconfig
source src/northbridge/intel/i82830/Kconfig
-source src/northbridge/intel/i855gme/Kconfig
-source src/northbridge/intel/i855pm/Kconfig
+source src/northbridge/intel/i855/Kconfig
source src/northbridge/intel/i945/Kconfig
Modified: trunk/src/northbridge/intel/Makefile.inc
==============================================================================
--- trunk/src/northbridge/intel/Makefile.inc Thu Feb 25 18:03:17 2010 (r5162)
+++ trunk/src/northbridge/intel/Makefile.inc Thu Feb 25 19:23:23 2010 (r5163)
@@ -6,6 +6,5 @@
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I440LX) += i440lx
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82830) += i82830
-subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855GME) += i855gme
-subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855PM) += i855pm
+subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855) += i855
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945) += i945
Modified: trunk/src/northbridge/intel/i855/Kconfig
==============================================================================
--- trunk/src/northbridge/intel/i855gme/Kconfig Thu Feb 25 18:03:17 2010 (r5162)
+++ trunk/src/northbridge/intel/i855/Kconfig Thu Feb 25 19:23:23 2010 (r5163)
@@ -1,4 +1,4 @@
-config NORTHBRIDGE_INTEL_I855GME
+config NORTHBRIDGE_INTEL_I855
bool
select HAVE_HIGH_TABLES
Modified: trunk/src/northbridge/intel/i855/chip.h
==============================================================================
--- trunk/src/northbridge/intel/i855gme/chip.h Thu Feb 25 18:03:17 2010 (r5162)
+++ trunk/src/northbridge/intel/i855/chip.h Thu Feb 25 19:23:23 2010 (r5163)
@@ -18,8 +18,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-struct northbridge_intel_i855gme_config
+struct northbridge_intel_i855_config
{
};
-extern struct chip_operations northbridge_intel_i855gme_ops;
+extern struct chip_operations northbridge_intel_i855_ops;
Modified: trunk/src/northbridge/intel/i855/northbridge.c
==============================================================================
--- trunk/src/northbridge/intel/i855gme/northbridge.c Thu Feb 25 18:03:17 2010 (r5162)
+++ trunk/src/northbridge/intel/i855/northbridge.c Thu Feb 25 19:23:23 2010 (r5163)
@@ -177,7 +177,7 @@
}
}
-struct chip_operations northbridge_intel_i855gme_ops = {
- CHIP_NAME("Intel 855GME Northbridge")
+struct chip_operations northbridge_intel_i855_ops = {
+ CHIP_NAME("Intel 855 Northbridge")
.enable_dev = enable_dev,
};
More information about the coreboot
mailing list