[coreboot] Porting to Asus M4A785-M

Sun Jun 13 20:25:04 CEST 2010

Hello,

I am trying to get coreboot working on Asus M4A785-M with Athlon II X2
240e CPU (Socket AM3). So far there is no success.

The mainboard is based on AMD785G + SB710 chipset, which has integrated
ATI VGA.

http://www.asus.com/product.aspx?P_ID=ef0qgvMIwOUagAVl&templete=2

The super IO chip is labeled ITE IT8712F-S. 

Please see the listings at the end of this post for details.

There is only pin header connector for COM1 serial port on the
mainboard. The back panel DB9 connector with cable to attach to the
mainboard must be bought separately. (The one I got has too short cable
to reach the PCI slot openings. And it was supposed to be an original
Asus part!)

The BIOS ROM is Macronix MX25L8005PC-15G, 1 MByte, DIP-8, mounted in a
socket. Flashrom 0.9.1 recognizes the chip and is able to read and write
it. 

I have built a small circuit board where I have two BIOS chips and can
select between them with a switch. The board is sitting in the BIOS
socket. This makes it easier to recover after flashing something
non-bootable.

I have tried with coreboot revision 5631 from SVN.

First, I connected the board via a null-modem cable to another Linux
machine, started getty at ttyS0, 115200 bps at the target machine and
minicom at the other machine. I get login prompt and can log in via
ttyS0, so the serial connection works.

Then I tried to build coreboot for ASRock 939A785GMH/128M, since it is
based on the same chip set. Flashing succeeds, but booting does not
work. Power light comes on, fans start, but otherwise there is no sign
of life, nothing on the serial port.

Then I noticed that the super IO type is different, make a new directory
under src/mainboard/asus for this board type, copy the contents from the
ASRock board, and change the references to the super I/O from a Winbond
chip to the ITE IT8712F.

There seemed to be a some code in the romstage.c that toggled the GPIO
pins in the super I/O chip, in function sio_init(). I made a guess that
this was something specific to the Winbond chip, so I commented those
out. The guess was based on #define -lines after the #include -section.

Also I generated a new irq_tables.c with the utility provided with
coreboot sources.

Now, when attempting to boot, I get the following from the serial port:

coreboot-4.0-r5631M Mon Jun 14 04:56:01 EEST 2010 starting...
bsp_apicid=0x0
Enabling routing table for node 00 done.
Enabling SMP settings

[...the same repeats...]

Now what to do next? 

The wiki documentation left me wondering what exactly are the necessary
steps to port coreboot, provided that all the basic components are
already supported. Which board-specific files are needed, and which ones
can be auto-generated vs. manually coded?

Best regards,
Juhana Helovuo

$ lspci -tvnn

> -[0000:00]-+-00.0  Advanced Micro Devices [AMD] RS780 Host Bridge Alternate [1022:9601]
>            +-01.0-[0000:01]--+-05.0  ATI Technologies Inc Device [1002:9710]
>            |                 \-05.1  ATI Technologies Inc Device [1002:970f]
>            +-0a.0-[0000:02]----00.0  Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168]
>            +-11.0  ATI Technologies Inc SB700/SB800 SATA Controller [IDE mode] [1002:4390]
>            +-12.0  ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397]
>            +-12.1  ATI Technologies Inc SB700 USB OHCI1 Controller [1002:4398]
>            +-12.2  ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396]
>            +-13.0  ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397]
>            +-13.1  ATI Technologies Inc SB700 USB OHCI1 Controller [1002:4398]
>            +-13.2  ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396]
>            +-14.0  ATI Technologies Inc SBx00 SMBus Controller [1002:4385]
>            +-14.1  ATI Technologies Inc SB700/SB800 IDE Controller [1002:439c]
>            +-14.2  ATI Technologies Inc SBx00 Azalia (Intel HDA) [1002:4383]
>            +-14.3  ATI Technologies Inc SB700/SB800 LPC host controller [1002:439d]
>            +-14.4-[0000:03]--
>            +-14.5  ATI Technologies Inc SB700/SB800 USB OHCI2 Controller [1002:4399]
>            +-18.0  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] HyperTransport Configuration [1022:1200]
>            +-18.1  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Address Map [1022:1201]
>            +-18.2  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] DRAM Controller [1022:1202]
>            +-18.3  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Miscellaneous Control [1022:1203]
>            \-18.4  Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Link Control [1022:1204]

All the PCI(-E) slots are empty. Everything in the above listing is integrated to the mainboard.

> # ./superiotool -d       
> superiotool r5549
> Found ITE IT8712F (id=0x8712, rev=0x8) at 0x2e
> Register dump:
> idx 20 21 22 23 24 2b
> val 87 12 08 00 00 00
> def 87 12 08 00 00 00
> LDN 0x00 (Floppy)
> idx 30 60 61 70 74 f0 f1
> val 00 03 f0 06 02 00 00
> def 00 03 f0 06 02 00 00
> LDN 0x01 (COM1)
> idx 30 60 61 70 f0 f1 f2 f3
> val 01 03 f8 04 00 50 00 7f
> def 00 03 f8 04 00 50 00 7f
> LDN 0x02 (COM2)
> idx 30 60 61 70 f0 f1 f2 f3
> val 00 02 f8 03 00 50 00 7f
> def 00 02 f8 03 00 50 00 7f
> LDN 0x03 (Parallel port)
> idx 30 60 61 62 63 70 74 f0
> val 01 03 78 00 00 07 04 00
> def 00 03 78 07 78 07 03 03
> LDN 0x04 (Environment controller)
> idx 30 60 61 62 63 70 f0 f1  f2 f3 f4 f5 f6
> val 01 02 90 02 30 00 00 00  00 00 00 00 ff
> def 00 02 90 02 30 09 00 00  00 00 00 NA NA
> LDN 0x05 (Keyboard)
> idx 30 60 61 62 63 70 71 f0
> val 01 00 60 00 64 01 02 04
> def 01 00 60 00 64 01 02 08
> LDN 0x06 (Mouse)
> idx 30 70 71 f0
> val 01 0c 02 00
> def 00 0c 02 00
> LDN 0x07 (GPIO)
> idx 25 26 27 28 29 2a 2c 60  61 62 63 64 65 70 71 72  73 74 b0 b1 b2 b3 b4 b5  b8 b9 ba bb bc bd c0 c1  c2 c3 c4 c8 c9 ca cb cc  e0 e1 e2 e3 e4 f0 f1 f2  f3 f4 f5 f6 f7 f8 f9 fa  fb fc fd
> val c0 23 00 00 00 00 1f 00  00 03 00 00 00 00 01 00  38 00 00 00 00 00 00 00  00 00 00 00 00 00 c0 23  00 00 00 c0 23 00 00 00  00 00 00 00 00 00 00 00  00 00 00 1a 00 00 00 00  00 00 00
> def 01 00 00 40 00 00 00 00  00 00 00 00 00 00 00 00  c0 00 00 00 00 00 00 00  00 00 00 00 00 00 01 00  00 40 00 01 00 00 40 00  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  00 NA 00
> LDN 0x08 (MIDI port)
> idx 30 60 61 70 f0
> val 00 03 00 0a 00
> def 00 03 00 0a 00
> LDN 0x09 (Game port)
> idx 30 60 61
> val 00 02 01
> def 00 02 01
> LDN 0x0a (Consumer IR)
> idx 30 60 61 70 f0
> val 00 03 10 0b 06
> def 00 03 10 0b 00
> 