[coreboot] [PATCH] New config option for 440BX northbridge

[Keith Hui]

Hi all,

This patch adds a Kconfig option for 440BX that enable compiling in the
proper value for the SDRAMPWR bit in SDRAMC register for 3 or 4 DIMM slots.
No more hard coding for 4 DIMM slots. Also sets it to be permanently enabled
for a few ASUS boards (P2B-LS/D/DS, P3B-F) that I know for sure have 4
slots.

This option only appears when Expert mode is selected in Kconfig.

The actual code in raminit.c is still being boot tested and would have to
wait until it boots all the way on my board. This just adds the config
option so it is there when the code is ready.

Cheers.

Signed-off-by: Keith Hui <buurin at gmail.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20100311/a588fe52/attachment.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: sdrampwrcfg.patch
Type: application/octet-stream
Size: 2349 bytes
Desc: not available
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20100311/a588fe52/attachment.obj>