[coreboot] [commit] r5338 - in trunk/src/northbridge/intel: e7501 i440bx i82810 i82830
repository service
svn at coreboot.org
Wed Mar 31 00:12:59 CEST 2010
Author: stepan
Date: Wed Mar 31 00:12:59 2010
New Revision: 5338
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5338
Log:
drop USE_INIT should be USE_PRINTK_IN_CAR here.
uint32_t should be u32
DEBUG_RAM_SETUP was failing on some northbridges
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Modified:
trunk/src/northbridge/intel/e7501/debug.c
trunk/src/northbridge/intel/i440bx/raminit.c
trunk/src/northbridge/intel/i82810/northbridge.c
trunk/src/northbridge/intel/i82810/raminit.c
trunk/src/northbridge/intel/i82830/raminit.c
Modified: trunk/src/northbridge/intel/e7501/debug.c
==============================================================================
--- trunk/src/northbridge/intel/e7501/debug.c Wed Mar 31 00:08:48 2010 (r5337)
+++ trunk/src/northbridge/intel/e7501/debug.c Wed Mar 31 00:12:59 2010 (r5338)
@@ -39,7 +39,7 @@
for(i = 0; i < 256; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "\r\n%02x:",i);
#else
print_debug("\r\n");
@@ -48,7 +48,7 @@
#endif
}
val = pci_read_config8(dev, i);
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, " %02x", val);
#else
print_debug_char(' ');
@@ -101,7 +101,7 @@
device = ctrl->channel0[i];
if (device) {
int j;
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
#else
print_debug("dimm: ");
@@ -113,7 +113,7 @@
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "\r\n%02x: ", j);
#else
print_debug("\r\n");
@@ -126,7 +126,7 @@
break;
}
byte = status & 0xff;
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -138,7 +138,7 @@
device = ctrl->channel1[i];
if (device) {
int j;
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
#else`
print_debug("dimm: ");
@@ -150,7 +150,7 @@
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "\r\n%02x: ", j);
#else
print_debug("\r\n");
@@ -163,7 +163,7 @@
break;
}
byte = status & 0xff;
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -181,7 +181,7 @@
for(device = 1; device < 0x80; device++) {
int j;
if( smbus_read_byte(device, 0) < 0 ) continue;
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "smbus: %02x", device);
#else
print_debug("smbus: ");
@@ -195,7 +195,7 @@
break;
}
if ((j & 0xf) == 0) {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "\r\n%02x: ",j);
#else
print_debug("\r\n");
@@ -204,7 +204,7 @@
#endif
}
byte = status & 0xff;
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -219,7 +219,7 @@
{
int i;
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "%04x:\r\n", port);
#else
print_debug_hex16(port);
@@ -228,7 +228,7 @@
for(i=0;i<256;i++) {
uint8_t val;
if ((i & 0x0f) == 0) {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "%02x:", i);
#else
print_debug_hex8(i);
@@ -236,7 +236,7 @@
#endif
}
val = inb(port);
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, " %02x",val);
#else
print_debug_char(' ');
@@ -255,7 +255,7 @@
print_debug("dump_mem:");
for(i=start;i<end;i++) {
if((i & 0xf)==0) {
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, "\r\n%08x:", i);
#else
print_debug("\r\n");
@@ -263,7 +263,7 @@
print_debug(":");
#endif
}
-#if CONFIG_USE_INIT
+#if CONFIG_USE_PRINTK_IN_CAR
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
#else
print_debug(" ");
Modified: trunk/src/northbridge/intel/i440bx/raminit.c
==============================================================================
--- trunk/src/northbridge/intel/i440bx/raminit.c Wed Mar 31 00:08:48 2010 (r5337)
+++ trunk/src/northbridge/intel/i440bx/raminit.c Wed Mar 31 00:12:59 2010 (r5338)
@@ -36,7 +36,9 @@
#define PRINT_DEBUG_HEX8(x) print_debug_hex8(x)
#define PRINT_DEBUG_HEX16(x) print_debug_hex16(x)
#define PRINT_DEBUG_HEX32(x) print_debug_hex32(x)
-#define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
+// no dump_pci_device in src/northbridge/intel/i440bx
+// #define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
+#define DUMPNORTH()
#else
#define PRINT_DEBUG(x)
#define PRINT_DEBUG_HEX8(x)
@@ -834,7 +836,7 @@
die("HALT\r\n");
}
if ((sz.side1 > 128)) {
- print_err ("DIMMs > 128MB per side\r\n"
+ print_err("DIMMs > 128MB per side\r\n"
"are not supported on this NB\r\n");
die("HALT\r\n");
}
Modified: trunk/src/northbridge/intel/i82810/northbridge.c
==============================================================================
--- trunk/src/northbridge/intel/i82810/northbridge.c Wed Mar 31 00:08:48 2010 (r5337)
+++ trunk/src/northbridge/intel/i82810/northbridge.c Wed Mar 31 00:12:59 2010 (r5338)
@@ -208,8 +208,6 @@
static void enable_dev(struct device *dev)
{
- struct device_path path;
-
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
Modified: trunk/src/northbridge/intel/i82810/raminit.c
==============================================================================
--- trunk/src/northbridge/intel/i82810/raminit.c Wed Mar 31 00:08:48 2010 (r5337)
+++ trunk/src/northbridge/intel/i82810/raminit.c Wed Mar 31 00:12:59 2010 (r5338)
@@ -30,12 +30,17 @@
-----------------------------------------------------------------------------*/
/* Debugging macros. */
+#define HAVE_ENOUGH_REGISTERS 0 /* Don't have enough registers to compile all
+ * debugging code with ROMCC
+ */
#if CONFIG_DEBUG_RAM_SETUP
#define PRINT_DEBUG(x) print_debug(x)
#define PRINT_DEBUG_HEX8(x) print_debug_hex8(x)
#define PRINT_DEBUG_HEX16(x) print_debug_hex16(x)
#define PRINT_DEBUG_HEX32(x) print_debug_hex32(x)
-#define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
+// no dump_pci_device in src/northbridge/intel/i82810/
+// #define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
+#define DUMPNORTH()
#else
#define PRINT_DEBUG(x)
#define PRINT_DEBUG_HEX8(x)
@@ -138,26 +143,29 @@
drp = (drp >> (i * 4)) & 0x0f;
dimm_size = translate_i82810_to_mb[drp];
- addr = (dimm_start * 1024 * 1024) + addr_offset;
if (dimm_size) {
+ addr = (dimm_start * 1024 * 1024) + addr_offset;
+#if HAVE_ENOUGH_REGISTERS
PRINT_DEBUG(" Sending RAM command 0x");
PRINT_DEBUG_HEX8(reg8);
PRINT_DEBUG(" to 0x");
PRINT_DEBUG_HEX32(addr);
PRINT_DEBUG("\r\n");
+#endif
read32(addr);
}
dimm_bank = translate_i82810_to_bank[drp];
- addr = ((dimm_start + dimm_bank) * 1024 * 1024) + addr_offset;
if (dimm_bank) {
+ addr = ((dimm_start + dimm_bank) * 1024 * 1024) + addr_offset;
+#if HAVE_ENOUGH_REGISTERS
PRINT_DEBUG(" Sending RAM command 0x");
PRINT_DEBUG_HEX8(reg8);
PRINT_DEBUG(" to 0x");
PRINT_DEBUG_HEX32(addr);
PRINT_DEBUG("\r\n");
-
+#endif
read32(addr);
}
Modified: trunk/src/northbridge/intel/i82830/raminit.c
==============================================================================
--- trunk/src/northbridge/intel/i82830/raminit.c Wed Mar 31 00:08:48 2010 (r5337)
+++ trunk/src/northbridge/intel/i82830/raminit.c Wed Mar 31 00:12:59 2010 (r5338)
@@ -67,9 +67,9 @@
DIMM-initialization functions.
-----------------------------------------------------------------------------*/
-static void do_ram_command(uint32_t command)
+static void do_ram_command(u32 command)
{
- uint32_t reg32;
+ u32 reg32;
/* Configure the RAM command. */
reg32 = pci_read_config32(NORTHBRIDGE, DRC);
@@ -82,7 +82,7 @@
PRINT_DEBUG("\r\n");
}
-static void ram_read32(uint8_t dimm_start, uint32_t offset)
+static void ram_read32(u8 dimm_start, u32 offset)
{
if (offset == 0x55aa55aa) {
PRINT_DEBUG(" Reading RAM at 0x");
@@ -114,7 +114,7 @@
static void initialize_dimm_rows(void)
{
int i, row;
- uint8_t dimm_start, dimm_end;
+ u8 dimm_start, dimm_end;
unsigned device;
dimm_start = 0;
@@ -487,7 +487,7 @@
static void northbridge_set_registers(void)
{
- uint16_t value;
+ u16 value;
int igd_memory = 0;
PRINT_DEBUG("Setting initial nothbridge registers....\r\n");
@@ -542,7 +542,7 @@
static void sdram_initialize(void)
{
int i;
- uint32_t reg32;
+ u32 reg32;
/* Setup Initial SDRAM Registers */
sdram_set_registers();
More information about the coreboot
mailing list