[coreboot] [superiotool] Fix VID / SPI registers for F71889

Neo The User neotheuser at ymail.com
Thu Nov 4 16:17:40 CET 2010


Hi, The SPI should be on 0x8, not 0x7, as that is the VID. I double checked the datasheet and came across this while working on the coreboot port for my board. This is a follow-up for the initial F71889 support for superiotool.


      
-------------- next part --------------
A non-text attachment was scrubbed...
Name: fix-SPI-VID.patch
Type: application/octet-stream
Size: 2680 bytes
Desc: not available
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20101104/be4d5a5e/attachment.obj>


More information about the coreboot mailing list