[coreboot] [PATCH] fix S3 support on AMD K8 famF
ranma+coreboot at tdiedrich.de
Mon Nov 22 01:31:19 CET 2010
Rudolf Marek wrote:
> Hi all,
> I think I fixed the S3 suspend/resume on AMD which was broken since
> Stephan did the change with cbmem :)
> The patch does following:
> 1) wraps the s3 parts of chipset code/memory init code with if
> CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c
> 2) the patch implements get_cbmem_toc in chipset specific way if defined.
> On Intel targets it should be unchanged. On K8T890 the the cbmem_toc is
> read from NVRAM. Why you ask? Because we cannot do it as on intel,
> because the framebuffer might be there making it hard to look for it in
> memory (and remember we need it so early that everying is uncached)
> 3) The patch removes hardcoded limits for suspend/resume save area (it
> was 1MB) on intel. Now it computes right numbers itself.
> 4) it impelements saving the memory during CAR to reserved range in sane
> way. First the sysinfo area (CAR data) is copied, then the rest after car
> is disabled (cached copy is used). I changed bit also the the copy of CAR
> area is now done uncached for target which I feel is more right.
> I think I did not change the Intel suspend/resume behaviour but best
> would be if someone can test it. Please note this patch was unfinished on
> my drive since ages and it would be very nice to get it in to prevent bit
> rotten it again.
> Now I feel it is done good way and should not break anything. I did a
> test with abuild and it seems fine.
> The Rachmann did suspend/resume support for Asus M2V he will post the patch soon.
> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
Tested and works fine for me on my M2V with patch to add
board-specific init and dsdt parts.
Acked-by: Tobias Diedrich <ranma+coreboot at tdiedrich.de>
Tobias PGP: http://8ef7ddba.uguu.de
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