[coreboot] [patch]: AMD DDR3 fix the register name
Bao, Zheng
Zheng.Bao at amd.com
Sun Sep 19 09:05:19 CEST 2010
Fix the typo. Field DisAutoRefresh is in DramTimngHi.
Signed-off-by: Zheng Bao <zheng.bao at amd.com>
Index: src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
===================================================================
--- src/northbridge/amd/amdmct/mct_ddr3/mct_d.c (revision 5818)
+++ src/northbridge/amd/amdmct/mct_ddr3/mct_d.c (working copy)
@@ -1220,7 +1220,7 @@
Set_NB32(dev, 0x88 + reg_off, DramTimingLo); /*DCT Timing
Low*/
if (pDCTstat->Speed > 4) {
- DramTimingLo |= 1 << DisAutoRefresh;
+ DramTimingHi |= 1 << DisAutoRefresh;
}
DramTimingHi |= 0x000018FF;
Set_NB32(dev, 0x8c + reg_off, DramTimingHi); /*DCT Timing
Hi*/
-------------- next part --------------
A non-text attachment was scrubbed...
Name: amd_ddr3_fix_register.patch
Type: application/octet-stream
Size: 645 bytes
Desc: amd_ddr3_fix_register.patch
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20100919/4ca38323/attachment.obj>
More information about the coreboot
mailing list