[coreboot] [PATCH] cache type for BIOS flash memory should be WP-MMIO, not WB-MMIO

[Marc Jones]

On Thu, Feb 10, 2011 at 12:32 PM, Scott Duplichan <scott at notabs.org> wrote:
> According to AMD documentation, cache type WP should be used for
> execution from flash memory. Coreboot uses WB. While there is no
> noticeable performance difference between the two settings, use
> of WB can cause a problem for a jtag debugger. The attached
> patch changes AMD cache as ram setting for flash execution from
> WB to WP.
>
> Signed-off-by: Scott Duplichan <scott at notabs.org>
>
> Index: src/cpu/amd/car/cache_as_ram.inc
> ===================================================================
> --- src/cpu/amd/car/cache_as_ram.inc    (revision 6341)
> +++ src/cpu/amd/car/cache_as_ram.inc    (working copy)
> @@ -294,11 +294,11 @@
>        xorl    %edx, %edx
>        /*
>         * IMPORTANT: The two lines below can _not_ be written like this:
> -        *   movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
> +        *   movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRPROT), %eax
>         * http://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
>         */
>        movl    $REAL_XIP_ROM_BASE, %eax
> -       orl     $MTRR_TYPE_WRBACK, %eax
> +       orl     $MTRR_TYPE_WRPROT, %eax
>        wrmsr
>
>        movl    $MTRRphysMask_MSR(1), %ecx
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>

Acked-by: Marc Jones <marcj303 at gmail.com>

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