[coreboot] Tyan 1832DL (440BX)
rogerx.oss at gmail.com
rogerx.oss at gmail.com
Sun Jan 9 11:09:07 CET 2011
Here's three more logs, with the v3 L2 cache patch (but I don't see any of it's
relevant printk's -- might have need/forgot to do a make clean).
warm boot fails.
cold1 boot gets to SeaBIOS menu along but at kernel execution, reboot is
executed -- sorry, forgot I had quiet param enabled!
cold2 boot reboots during bios init and fails.
(I've had more success using coreboots video option rom execution versus
Seabios. I will try with Seabios (stable & svn) video option rom next on
this board, but it usually fails.)
--
Roger
http://rogerx.freeshell.org/
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coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 starting...
DIMM 0: 50
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 00 00 00
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 04 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00
60: 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00
70: 00 1f 02 38 00 00 00 00 00 00 00 38 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
Found DIMM in slot 3
PGPOL[BPR] has been set to 0xff
RPS has been set to 0xaaaa
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
Enabling refresh (DRAMC = 0x09) for DIMM 00
Enabling refresh (DRAMC = 0x09) for DIMM 01
Enabling refresh (DRAMC = 0x09) for DIMM 02
Enabling refresh (DRAMC = 0x09) for DIMM 03
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 00 00 00
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 20 30 40 50 60 70 80 00 b0 2a 00 a0 aa 00 00
70: 00 1f 02 38 aa aa 00 00 00 ff 10 38 10 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c fe ff 7f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Loading image.
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (212992 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
POST: 0x80
POST: 0x39
coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 booting...
POST: 0x40
clocks_per_usec: 753
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
Compare with tree...
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
POST: 0x5f
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/7190] ops
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:07.0 [8086/7110] bus ops
PCI: 00:07.0 [8086/7110] enabled
PCI: 00:07.1 [8086/7111] ops
PCI: 00:07.1 [8086/7111] enabled
PCI: 00:07.2 [8086/7112] ops
PCI: 00:07.2 [8086/7112] enabled
PCI: 00:07.3 [8086/7113] bus ops
pwrmgt_enable: gpo default missing in devicetree.cb!
PCI: 00:07.3 [8086/7113] enabled
malloc Enter, size 68, free_mem_ptr 00130000
malloc 00130000
PCI: 00:11.0 [1095/3512] enabled
malloc Enter, size 68, free_mem_ptr 00130044
malloc 00130044
Capability: type 0x01 @ 0x80
Capability: type 0x06 @ 0x90
Capability: type 0x03 @ 0xa0
Capability: type 0x01 @ 0x80
Capability: type 0x06 @ 0x90
Capability: type 0x03 @ 0xa0
PCI: 00:12.0 [3388/0021] enabled
malloc Enter, size 68, free_mem_ptr 00130088
malloc 00130088
PCI: 00:13.0 [1102/0002] enabled
malloc Enter, size 68, free_mem_ptr 001300cc
malloc 001300cc
PCI: 00:13.1 [1102/7002] enabled
malloc Enter, size 68, free_mem_ptr 00130110
malloc 00130110
PCI: 00:14.0 [8086/1229] enabled
POST: 0x25
do_pci_scan_bridge for PCI: 00:01.0
malloc Enter, size 24, free_mem_ptr 00130154
malloc 00130154
PCI: pci_scan_bus for bus 01
POST: 0x24
malloc Enter, size 68, free_mem_ptr 0013016c
malloc 0013016c
PCI: 01:00.0 [10de/02e1] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=001
POST: 0x55
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:07.0
malloc Enter, size 2560, free_mem_ptr 001301b0
malloc 001301b0
PNP: 002e.0 enabled
PNP: 002e.1 enabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.4 enabled
PNP: 002e.5 enabled
PNP: 002e.6 enabled
scan_static_bus for PCI: 00:07.0 done
scan_static_bus for PCI: 00:07.3
scan_static_bus for PCI: 00:07.3 done
do_pci_scan_bridge for PCI: 00:12.0
malloc Enter, size 24, free_mem_ptr 00130bb0
malloc 00130bb0
PCI: pci_scan_bus for bus 02
POST: 0x24
malloc Enter, size 68, free_mem_ptr 00130bc8
malloc 00130bc8
PCI: 02:08.0 [1033/0035] enabled
malloc Enter, size 68, free_mem_ptr 00130c0c
malloc 00130c0c
PCI: 02:08.1 [1033/0035] enabled
malloc Enter, size 68, free_mem_ptr 00130c50
malloc 00130c50
PCI: 02:08.2 [1033/00e0] enabled
malloc Enter, size 68, free_mem_ptr 00130c94
malloc 00130c94
PCI: 02:0b.0 [104c/8020] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
do_pci_scan_bridge returns max 2
PCI: pci_scan_bus returning with max=002
POST: 0x55
scan_static_bus for Root Device done
done
POST: 0x66
Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:07.0 read_resources bus 0 link: 0
PNP: 002e.4 missing read_resources
PCI: 00:07.0 read_resources bus 0 link: 0 done
PCI: 00:12.0 read_resources bus 2 link: 0
PCI: 00:12.0 read_resources bus 2 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
PCI: 00:01.0 child on link 0 PCI: 01:00.0
PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
PCI: 01:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 14
PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 18
PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
PCI: 00:07.0 child on link 0 PNP: 002e.0
PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
PNP: 002e.0
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags c0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.4
PNP: 002e.5
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.6
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PCI: 00:07.1
PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:07.2
PCI: 00:07.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:07.3
PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 200 align 9 gran 9 limit ffffffff flags 200 index 24
PCI: 00:11.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30
PCI: 00:12.0 child on link 0 PCI: 02:08.0
PCI: 00:12.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:12.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:12.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:08.0
PCI: 02:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 02:08.1
PCI: 02:08.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 02:08.2
PCI: 02:08.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
PCI: 02:0b.0
PCI: 02:0b.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10
PCI: 02:0b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:14.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 14
PCI: 00:14.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
PCI: 00:14.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 2200 index 30
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:12.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:12.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.0 14 * [0x0 - 0x3f] io
PCI: 00:07.2 20 * [0x40 - 0x5f] io
PCI: 00:13.0 10 * [0x60 - 0x7f] io
PCI: 00:07.1 20 * [0x80 - 0x8f] io
PCI: 00:11.0 20 * [0x90 - 0x9f] io
PCI: 00:11.0 10 * [0xa0 - 0xa7] io
PCI: 00:11.0 18 * [0xa8 - 0xaf] io
PCI: 00:13.1 10 * [0xb0 - 0xb7] io
PCI: 00:11.0 14 * [0xb8 - 0xbb] io
PCI: 00:11.0 1c * [0xbc - 0xbf] io
PCI_DOMAIN: 0000 compute_resources_io: base: c0 size: c0 align: 6 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 14 * [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 compute_resources_prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xffffff] mem
PCI: 01:00.0 18 * [0x1000000 - 0x1ffffff] mem
PCI: 01:00.0 30 * [0x2000000 - 0x201ffff] mem
PCI: 00:01.0 compute_resources_mem: base: 2020000 size: 2100000 align: 24 gran: 20 limit: ffffffff done
PCI: 00:12.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:12.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:12.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:0b.0 14 * [0x0 - 0x3fff] mem
PCI: 02:08.0 10 * [0x4000 - 0x4fff] mem
PCI: 02:08.1 10 * [0x5000 - 0x5fff] mem
PCI: 02:0b.0 10 * [0x6000 - 0x67ff] mem
PCI: 02:08.2 10 * [0x6800 - 0x68ff] mem
PCI: 00:12.0 compute_resources_mem: base: 6900 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 10 * [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 24 * [0x10000000 - 0x1fffffff] prefmem
PCI: 00:01.0 20 * [0x20000000 - 0x220fffff] mem
PCI: 00:12.0 20 * [0x22100000 - 0x221fffff] mem
PCI: 00:14.0 18 * [0x22200000 - 0x222fffff] mem
PCI: 00:14.0 30 * [0x22300000 - 0x223fffff] mem
PCI: 00:11.0 30 * [0x22400000 - 0x2247ffff] mem
PCI: 00:14.0 10 * [0x22480000 - 0x22480fff] mem
PCI: 00:11.0 24 * [0x22481000 - 0x224811ff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 22481200 size: 22481200 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:07.0
constrain_resources: PNP: 002e.0
constrain_resources: PNP: 002e.1
constrain_resources: PNP: 002e.2
constrain_resources: PNP: 002e.3
constrain_resources: PNP: 002e.4
constrain_resources: PNP: 002e.5
constrain_resources: PNP: 002e.6
constrain_resources: PCI: 00:07.1
constrain_resources: PCI: 00:07.2
constrain_resources: PCI: 00:07.3
constrain_resources: PCI: 00:11.0
constrain_resources: PCI: 00:12.0
constrain_resources: PCI: 02:08.0
constrain_resources: PCI: 02:08.1
constrain_resources: PCI: 02:08.2
constrain_resources: PCI: 02:0b.0
constrain_resources: PCI: 00:13.0
constrain_resources: PCI: 00:13.1
constrain_resources: PCI: 00:14.0
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000e3ff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
lim->base 00000000 lim->limit ff7fffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:c0 align:6 gran:0 limit:e3ff
Assigned: PCI: 00:14.0 14 * [0x1000 - 0x103f] io
Assigned: PCI: 00:07.2 20 * [0x1040 - 0x105f] io
Assigned: PCI: 00:13.0 10 * [0x1060 - 0x107f] io
Assigned: PCI: 00:07.1 20 * [0x1080 - 0x108f] io
Assigned: PCI: 00:11.0 20 * [0x1090 - 0x109f] io
Assigned: PCI: 00:11.0 10 * [0x10a0 - 0x10a7] io
Assigned: PCI: 00:11.0 18 * [0x10a8 - 0x10af] io
Assigned: PCI: 00:13.1 10 * [0x10b0 - 0x10b7] io
Assigned: PCI: 00:11.0 14 * [0x10b8 - 0x10bb] io
Assigned: PCI: 00:11.0 1c * [0x10bc - 0x10bf] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 10c0 size: c0 align: 6 gran: 0 done
PCI: 00:01.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:01.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI: 00:12.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:12.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:22481200 align:28 gran:0 limit:ff7fffff
Assigned: PCI: 00:00.0 10 * [0xd0000000 - 0xdfffffff] prefmem
Assigned: PCI: 00:01.0 24 * [0xe0000000 - 0xefffffff] prefmem
Assigned: PCI: 00:01.0 20 * [0xf0000000 - 0xf20fffff] mem
Assigned: PCI: 00:12.0 20 * [0xf2100000 - 0xf21fffff] mem
Assigned: PCI: 00:14.0 18 * [0xf2200000 - 0xf22fffff] mem
Assigned: PCI: 00:14.0 30 * [0xf2300000 - 0xf23fffff] mem
Assigned: PCI: 00:11.0 30 * [0xf2400000 - 0xf247ffff] mem
Assigned: PCI: 00:14.0 10 * [0xf2480000 - 0xf2480fff] mem
Assigned: PCI: 00:11.0 24 * [0xf2481000 - 0xf24811ff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f2481200 size: 22481200 align: 28 gran: 0 done
PCI: 00:01.0 allocate_resources_prefmem: base:e0000000 size:10000000 align:28 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 14 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:01.0 allocate_resources_prefmem: next_base: f0000000 size: 10000000 align: 28 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:f0000000 size:2100000 align:24 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 10 * [0xf0000000 - 0xf0ffffff] mem
Assigned: PCI: 01:00.0 18 * [0xf1000000 - 0xf1ffffff] mem
Assigned: PCI: 01:00.0 30 * [0xf2000000 - 0xf201ffff] mem
PCI: 00:01.0 allocate_resources_mem: next_base: f2020000 size: 2100000 align: 24 gran: 20 done
PCI: 00:12.0 allocate_resources_prefmem: base:ff7fffff size:0 align:20 gran:20 limit:ff7fffff
PCI: 00:12.0 allocate_resources_prefmem: next_base: ff7fffff size: 0 align: 20 gran: 20 done
PCI: 00:12.0 allocate_resources_mem: base:f2100000 size:100000 align:20 gran:20 limit:ff7fffff
Assigned: PCI: 02:0b.0 14 * [0xf2100000 - 0xf2103fff] mem
Assigned: PCI: 02:08.0 10 * [0xf2104000 - 0xf2104fff] mem
Assigned: PCI: 02:08.1 10 * [0xf2105000 - 0xf2105fff] mem
Assigned: PCI: 02:0b.0 10 * [0xf2106000 - 0xf21067ff] mem
Assigned: PCI: 02:08.2 10 * [0xf2106800 - 0xf21068ff] mem
PCI: 00:12.0 allocate_resources_mem: next_base: f2106900 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 1024 MB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f0000000 - 0x00f20fffff] size 0x02100000 gran 0x14 bus 01 mem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f0ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 01:00.0 18 <- [0x00f1000000 - 0x00f1ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 30 <- [0x00f2000000 - 0x00f201ffff] size 0x00020000 gran 0x11 romem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 00:07.0 assign_resources, bus 0 link: 0
PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 002e.1 60 <- [0x0000000378 - 0x0000000777] size 0x00000400 gran 0x0a io
PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned
PNP: 002e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.2 74 drq size: 0x0000000001 not assigned
ERROR: PNP: 002e.2 75 drq size: 0x0000000001 not assigned
PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.6 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io
PNP: 002e.6 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io
PNP: 002e.6 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PCI: 00:07.0 assign_resources, bus 0 link: 0
PCI: 00:07.1 20 <- [0x0000001080 - 0x000000108f] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:11.0 10 <- [0x00000010a0 - 0x00000010a7] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x00000010b8 - 0x00000010bb] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x00000010a8 - 0x00000010af] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x00000010bc - 0x00000010bf] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000001090 - 0x000000109f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f2481000 - 0x00f24811ff] size 0x00000200 gran 0x09 mem
PCI: 00:11.0 30 <- [0x00f2400000 - 0x00f247ffff] size 0x00080000 gran 0x13 romem
PCI: 00:12.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:12.0 24 <- [0x00ff7fffff - 0x00ff7ffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:12.0 20 <- [0x00f2100000 - 0x00f21fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:12.0 assign_resources, bus 2 link: 0
PCI: 02:08.0 10 <- [0x00f2104000 - 0x00f2104fff] size 0x00001000 gran 0x0c mem
PCI: 02:08.1 10 <- [0x00f2105000 - 0x00f2105fff] size 0x00001000 gran 0x0c mem
PCI: 02:08.2 10 <- [0x00f2106800 - 0x00f21068ff] size 0x00000100 gran 0x08 mem
PCI: 02:0b.0 10 <- [0x00f2106000 - 0x00f21067ff] size 0x00000800 gran 0x0b mem
PCI: 02:0b.0 14 <- [0x00f2100000 - 0x00f2103fff] size 0x00004000 gran 0x0e mem
PCI: 00:12.0 assign_resources, bus 2 link: 0
PCI: 00:13.0 10 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
PCI: 00:13.1 10 <- [0x00000010b0 - 0x00000010b7] size 0x00000008 gran 0x03 io
PCI: 00:14.0 10 <- [0x00f2480000 - 0x00f2480fff] size 0x00001000 gran 0x0c mem
PCI: 00:14.0 14 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:14.0 18 <- [0x00f2200000 - 0x00f22fffff] size 0x00100000 gran 0x14 mem
PCI: 00:14.0 30 <- [0x00f2300000 - 0x00f23fffff] size 0x00100000 gran 0x14 romem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 1000 size c0 align 6 gran 0 limit e3ff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base d0000000 size 22481200 align 28 gran 0 limit ff7fffff flags 40040200 index 10000100
PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
PCI_DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index b
PCI: 00:00.0
PCI: 00:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 10
PCI: 00:01.0 child on link 0 PCI: 01:00.0
PCI: 00:01.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 20 limit ff7fffff flags 60081202 index 24
PCI: 00:01.0 resource base f0000000 size 2100000 align 24 gran 20 limit ff7fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base f0000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 10
PCI: 01:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 14
PCI: 01:00.0 resource base f1000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 18
PCI: 01:00.0 resource base f2000000 size 20000 align 17 gran 17 limit ff7fffff flags 60002200 index 30
PCI: 00:07.0 child on link 0 PNP: 002e.0
PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
PNP: 002e.0
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags e0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.4
PNP: 002e.5
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.6
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PCI: 00:07.1
PCI: 00:07.1 resource base 1080 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
PCI: 00:07.2
PCI: 00:07.2 resource base 1040 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20
PCI: 00:07.3
PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
PCI: 00:11.0
PCI: 00:11.0 resource base 10a0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
PCI: 00:11.0 resource base 10b8 size 4 align 2 gran 2 limit e3ff flags 60000100 index 14
PCI: 00:11.0 resource base 10a8 size 8 align 3 gran 3 limit e3ff flags 60000100 index 18
PCI: 00:11.0 resource base 10bc size 4 align 2 gran 2 limit e3ff flags 60000100 index 1c
PCI: 00:11.0 resource base 1090 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
PCI: 00:11.0 resource base f2481000 size 200 align 9 gran 9 limit ff7fffff flags 60000200 index 24
PCI: 00:11.0 resource base f2400000 size 80000 align 19 gran 19 limit ff7fffff flags 60002200 index 30
PCI: 00:12.0 child on link 0 PCI: 02:08.0
PCI: 00:12.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
PCI: 00:12.0 resource base ff7fffff size 0 align 20 gran 20 limit ff7fffff flags 60081202 index 24
PCI: 00:12.0 resource base f2100000 size 100000 align 20 gran 20 limit ff7fffff flags 60080202 index 20
PCI: 02:08.0
PCI: 02:08.0 resource base f2104000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 02:08.1
PCI: 02:08.1 resource base f2105000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 02:08.2
PCI: 02:08.2 resource base f2106800 size 100 align 8 gran 8 limit ff7fffff flags 60000200 index 10
PCI: 02:0b.0
PCI: 02:0b.0 resource base f2106000 size 800 align 11 gran 11 limit ff7fffff flags 60000200 index 10
PCI: 02:0b.0 resource base f2100000 size 4000 align 14 gran 14 limit ff7fffff flags 60000200 index 14
PCI: 00:13.0
PCI: 00:13.0 resource base 1060 size 20 align 5 gran 5 limit e3ff flags 60000100 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 10b0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base f2480000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 00:14.0 resource base 1000 size 40 align 6 gran 6 limit e3ff flags 60000100 index 14
PCI: 00:14.0 resource base f2200000 size 100000 align 20 gran 20 limit ff7fffff flags 60000200 index 18
PCI: 00:14.0 resource base f2300000 size 100000 align 20 gran 20 limit ff7fffff flags 60002200 index 30
Done allocating resources.
POST: 0x88
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 008b
PCI: 00:01.0 cmd <- 07
PCI: 00:07.0 cmd <- 07
PCI: 00:07.1 cmd <- 01
PCI: 00:07.2 cmd <- 01
PCI: 00:07.3 cmd <- 01
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 bridge ctrl <- 0003
PCI: 00:12.0 cmd <- 06
PCI: 00:13.0 cmd <- 01
PCI: 00:13.1 cmd <- 01
PCI: 00:14.0 cmd <- 03
PCI: 01:00.0 cmd <- 03
PCI: 02:08.0 cmd <- 02
PCI: 02:08.1 cmd <- 02
PCI: 02:08.2 cmd <- 02
PCI: 02:0b.0 cmd <- 02
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
malloc Enter, size 68, free_mem_ptr 00130cd8
malloc 00130cd8
Initializing CPU #0
CPU: vendor Intel device 686
CPU: family 06, model 08, stepping 06
POST: 0x60
Enabling cache
Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB
ADDRESS_MASK_HIGH=0xf
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
POST: 0x6a
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
microcode_info: sig = 0x00000686 pf=0x00000010 rev = 0x00000000
Disabling local apic...done.
POST: 0x9b
CPU #0 initialized
PCI: 00:00.0 init
Northbridge Init
PCI: 00:07.0 init
RTC Init
PCI: 00:07.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: off
IDE: Primary IDE interface, drive 1: UDMA/33: off
IDE: Secondary IDE interface, drive 0: UDMA/33: off
IDE: Secondary IDE interface, drive 1: UDMA/33: off
PCI: 00:07.2 init
PCI: 00:11.0 init
PCI: 00:13.0 init
PCI: 00:13.1 init
PCI: 00:14.0 init
PCI: 01:00.0 init
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
CBFS: follow chain: fffc34c0 + 38 + 148d7 + align -> fffd7e00
Check fallback/payload
CBFS: follow chain: fffd7e00 + 38 + bd99 + align -> fffe3c00
Check
CBFS: follow chain: fffe3c00 + 28 + 1c076 + align -> fffffcc0
CBFS: Could not find file pci10de,02e1.rom
On card, ROM address for PCI: 01:00.0 = f2000000
PCI expansion ROM, signature 0xaa55, INIT size 0xee00, data ptr 0x00b8
PCI ROM image, vendor ID 10de, device ID 02e1,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from f2000000 to 0xc0000, 0xee00 bytes
Real mode stub @00000600: 606 bytes
Calling Option ROM...
... Option ROM returned.
PNP: 002e.0 init
PNP: 002e.1 init
PNP: 002e.2 init
PNP: 002e.3 init
PNP: 002e.5 init
PNP: 002e.6 init
Keyboard init...
No PS/2 keyboard detected.
PCI: 02:08.0 init
PCI: 02:08.1 init
PCI: 02:08.2 init
PCI: 02:0b.0 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:14.0: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:08.0: enabled 1
PCI: 02:08.1: enabled 1
PCI: 02:08.2: enabled 1
PCI: 02:0b.0: enabled 1
CPU: 00: enabled 1
POST: 0x89
Initializing CBMEM area to 0x3fff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 3fff0200...ok
High Tables Base is 3fff0000.
POST: 0x9d
Adding CBMEM entry as no. 2
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518 checksum bbdf
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x3fff0400
rom_table_end = 0x3fff0400
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x3fff0400 to 0x40000000
Adding high table area
coreboot memory table:
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-000000003ffeffff: RAM
3. 000000003fff0000-000000003fffffff: CONFIGURATION TABLES
4. 00000000ff800000-00000000ffffffff: RESERVED
Wrote coreboot table at: 3fff0400 - 3fff05ac checksum 2d4d
coreboot table: 428 bytes.
POST: 0x9e
POST: 0x9d
Multiboot Information structure has been written.
0. FREE SPACE 3fff2400 0000dc00
1. GDT 3fff0200 00000200
2. COREBOOT 3fff0400 00002000
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
CBFS: follow chain: fffc34c0 + 38 + 148d7 + align -> fffd7e00
Check fallback/payload
Got a payload
Loading segment from rom address 0xfffd7e38
data (compression=1)
malloc Enter, size 36, free_mem_ptr 00130d1c
malloc 00130d1c
New segment dstaddr 0xe7c70 memsize 0x18390 srcaddr 0xfffd7e70 filesize 0xbd61
(cleaned up) New segment addr 0xe7c70 size 0x18390 offset 0xfffd7e70 filesize 0xbd61
Loading segment from rom address 0xfffd7e54
Entry Point 0x000fc1a9
Loading Segment: addr: 0x00000000000e7c70 memsz: 0x0000000000018390 filesz: 0x000000000000bd61
lb: [0x0000000000100000, 0x0000000000134000)
Post relocation: addr: 0x00000000000e7c70 memsz: 0x0000000000018390 filesz: 0x000000000000bd61
using LZMA
[ 0x000e7c70, 00100000, 0x00100000) <- fffd7e70
dest 000e7c70, end 00100000, bouncebuffer 3ff88000
Loaded segments
Jumping to boot code at fc1a9
POST: 0xfe
entry = 0x000fc1a9
lb_start = 0x00100000
lb_size = 0x00034000
adjust = 0x3febc000
buffer = 0x3ff88000
elf_boot_notes = 0x001246fc
adjusted_boot_notes = 0x3ffe06fc
Start bios (version 0.6.1.2-20110108_140959-localhost2.local)
init ivt
init bda
Find memory size
Attempting to find coreboot table
Found coreboot table forwarder.
Unable to find coreboot table!
Add to e820 map: 00000000 01000000 1
Found CBFS header at 0xfffffc9e
Add to e820 map: 000a0000 00050000 -1
Add to e820 map: 0009fc00 00000400 2
Add to e820 map: 000f0000 00010000 2
Ram Size=0x01000000 (0x0000000000000000 high)
malloc setup
Add to e820 map: 00ff0000 00010000 2
init pic
init timer
tsc calibrate start=3515867464 end=3517158259 diff=1290795
CPU Mhz=752
math cp init
init boot device ordering
No apic - only the main cpu is present.
init bios32
init PMM
init PNPBIOS table
init keyboard
init mouse
Scan for VGA option rom
Attempting to init PCI bdf 01:00.0 (vd 10de:02e1)
Searching CBFS for prefix pci10de,02e1.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 01:00.0
Option rom sizing returned f2000001 fffe0000
Inspecting possible rom at 0xf2000000 (vd=10de:02e1 bdf=01:00.0)
Copying option rom (size 60928) from 0xf2000000 to c0000
Checking rom 0x000c0000 (sig aa55 size 119)
Running option rom at c000:0003
Searching CBFS for prefix vgaroms/
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Turning on vga text mode console
SeaBIOS (version 0.6.1.2-20110108_140959-localhost2.local)
init usb
pmm_malloc zone=0x000f59bc handle=ffffffff size=32 align=10 ret=0x00fefec0 (detail=0x00fefee0)
UHCI init on dev 00:07.2 (io=1040)
pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fee000 (detail=0x00fefe90)
/00fee000\ Start thread
|00fee000| pmm_malloc zone=0x000f59b0 handle=ffffffff size=16 align=10 ret=0x00fffff0 (detail=0x00fefe60)
|00fee000| pmm_malloc zone=0x000f59b0 handle=ffffffff size=4096 align=1000 ret=0x00ffe000 (detail=0x00fefe30)
|00fee000| pmm_malloc zone=0x000f59b0 handle=ffffffff size=8 align=10 ret=0x00ffffe0 (detail=0x00fefe00)
|00fee000| pmm_malloc zone=0x000f59b0 handle=ffffffff size=8 align=10 ret=0x00ffffd0 (detail=0x00fefdd0)
|00fee000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fed000 (detail=0x00fefda0)
/00fed000\ Start thread
|00fee000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fec000 (detail=0x00fefd70)
/00fec000\ Start thread
pmm_malloc zone=0x000f59bc handle=ffffffff size=68 align=10 ret=0x00fefcf0 (detail=0x00fefd40)
EHCI init on dev 02:08.2 (regs=0xf2106820)
pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00feb000 (detail=0x00fefcc0)
/00feb000\ Start thread
|00feb000| pmm_malloc zone=0x000f59b0 handle=ffffffff size=4096 align=1000 ret=0x00ffd000 (detail=0x00fefc90)
|00feb000| pmm_malloc zone=0x000f59b0 handle=ffffffff size=48 align=40 ret=0x00ffff80 (detail=0x00fefc60)
|00feb000| pmm_malloc zone=0x000f59b0 handle=ffffffff size=48 align=40 ret=0x00ffff40 (detail=0x00fefc30)
|00feb000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fea000 (detail=0x00fefc00)
/00fea000\ Start thread
|00feb000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe9000 (detail=0x00fefbd0)
/00fe9000\ Start thread
|00feb000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe8000 (detail=0x00fefba0)
/00fe8000\ Start thread
|00feb000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe7000 (detail=0x00fefb70)
/00fe7000\ Start thread
|00feb000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe6000 (detail=0x00fefb40)
/00fe6000\ Start thread
init ps2port
pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe5000 (detail=0x00fefb10)
/00fe5000\ Start thread
|00fe5000| i8042_flush
|00fe5000| i8042_command cmd=1aa
|00fe5000| i8042_wait_write
|00fe5000| i8042_wait_read
|00fe5000| i8042 param=55
|00fe5000| i8042_command cmd=1ab
|00fe5000| i8042_wait_write
|00fe5000| i8042_wait_read
|00fe5000| i8042 param=0
|00fe5000| ps2_command aux=0 cmd=2ff
|00fe5000| i8042 ctr old=30 new=30
|00fe5000| i8042_command cmd=1060
|00fe5000| i8042_wait_write
|00fe5000| i8042_wait_write
init lpt
Found 1 lpt ports
init serial
Found 2 serial ports
init hard drives
pmm_malloc zone=0x000f59b4 handle=ffffffff size=12 align=10 ret=0x000fdce0 (detail=0x00fefae0)
ATA controller 0 at 1f0/3f4/1080 (irq 14 dev 39)
pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe4000 (detail=0x00fefab0)
/00fe4000\ Start thread
|00fe4000| powerup iobase=1f0 st=0
|00fe4000| powerup iobase=1f0 st=0
|00fe4000| ata_detect ata0-0: sc=5c sn=5c dh=20
|00fe4000| powerup iobase=1f0 st=5c
|00fe4000| powerup iobase=1f0 st=0
|00fe4000| ata_detect ata0-1: sc=7f sn=7f dh=0
pmm_free 0x00fe4000 (detail=0x00fefab0)
\00fe4000/ End thread
pmm_malloc zone=0x000f59b4 handle=ffffffff size=12 align=10 ret=0x000fdcd0 (detail=0x00fefab0)
ATA controller 1 at 170/374/1088 (irq 15 dev 39)
pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe4000 (detail=0x00fefa80)
/00fe4000\ Start thread
|00fe4000| powerup iobase=170 st=0
|00fe4000| powerup iobase=170 st=0
|00fe4000| ata_detect ata1-0: sc=55 sn=aa dh=a0
|00fe4000| ata_reset drive=0x00fe4f94
|00fed000| set_address 0x00fefec0
|00fed000| uhci_alloc_control_pipe 0x00fefec0
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=28 align=10 ret=0x00fefa30 (detail=0x00fefa50)
|00fe9000| pmm_free 0x00fea000 (detail=0x00fefc00)
\00fea000/ End thread
|00fe7000| pmm_free 0x00fe8000 (detail=0x00fefba0)
\00fe8000/ End thread
|00feb000| pmm_free 0x00fe6000 (detail=0x00fefb40)
\00fe6000/ End thread
|00fe5000| i8042_command cmd=1060
|00fe5000| i8042_wait_write
|00fe5000| i8042_wait_write
|00fe5000| ps2_sendbyte aux=0 cmd=ff
|00fe5000| i8042_kbd_write c=255
|00fe5000| i8042_wait_write
|00fe4000| ata_reset exit status=0
|00fed000| uhci_control 0x00fefa3c
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=32 align=10 ret=0x00fefbb0 (detail=0x00fefc00)
|00fe4000| pmm_malloc zone=0x000f59bc handle=ffffffff size=80 align=10 ret=0x00fef9e0 (detail=0x00fefb40)
|00fe4000| pmm_malloc zone=0x000f59b4 handle=ffffffff size=44 align=10 ret=0x000fdca0 (detail=0x00fef9b0)
|00fe4000| ata1-0: TSSTcorp CDDVDW SH-S222L ATAPI-7 DVD/CD
|00fe4000| Mapping cd drive 0x000fdca0
|00fe4000| ata_detect resetresult=2000
|00fe4000| powerup iobase=170 st=50
|00fe4000| powerup iobase=170 st=1
|00fe4000| ata_detect ata1-1: sc=0 sn=7f dh=b0
pmm_free 0x00fe4000 (detail=0x00fefa80)
\00fe4000/ End thread
|00fed000| pmm_free 0x00fefbb0 (detail=0x00fefc00)
|00fe9000| set_address 0x00fefcf0
|00fe9000| ehci_alloc_control_pipe 0x00fefcf0
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=72 align=40 ret=0x00fef940 (detail=0x00fefc00)
|00fe5000| ps2 read fe
|00fe5000| Got ps2 nak (status=51)
|00fe5000| i8042_command cmd=1060
|00fe5000| i8042_wait_write
|00fe5000| i8042_wait_write
|00fe5000| ps2 command 2ff failed (aux=0)
pmm_free 0x00fe5000 (detail=0x00fefb10)
\00fe5000/ End thread
|00fed000| uhci_alloc_control_pipe 0x00fefec0
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=28 align=10 ret=0x00fefb20 (detail=0x00fefba0)
|00fed000| config_usb: 0x00fefb2c
|00fed000| uhci_control 0x00fefb2c
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=48 align=10 ret=0x00fef910 (detail=0x00fefa80)
|00fec000| set_address 0x00fefec0
|00fe9000| ehci_control 0x00fef97c
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef880 (detail=0x00fef8e0)
|00fed000| pmm_free 0x00fef910 (detail=0x00fefa80)
|00fed000| device rev=0110 cls=00 sub=00 proto=00 size=08
|00fed000| uhci_control 0x00fefb2c
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=64 align=10 ret=0x00fef840 (detail=0x00fefa80)
|00fec000| uhci_control 0x00fefa3c
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=32 align=10 ret=0x00fef990 (detail=0x00fef910)
|00fe9000| pmm_free 0x00fef880 (detail=0x00fef8e0)
|00fed000| pmm_free 0x00fef840 (detail=0x00fefa80)
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=281 align=10 ret=0x00fef7f0 (detail=0x00fefa80)
|00fed000| uhci_control 0x00fefb2c
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=608 align=10 ret=0x00fef560 (detail=0x00fef7c0)
|00fec000| pmm_free 0x00fef990 (detail=0x00fef910)
|00fe9000| ehci_alloc_control_pipe 0x00fefcf0
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=72 align=40 ret=0x00fef500 (detail=0x00fef910)
|00fe9000| config_usb: 0x00fef53c
|00fe9000| ehci_control 0x00fef53c
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef460 (detail=0x00fef4d0)
|00fed000| pmm_free 0x00fef560 (detail=0x00fef7c0)
|00fed000| pmm_free 0x00fef7f0 (detail=0x00fefa80)
|00fed000| uhci_free_pipe 0x00fefb2c
|00fec000| uhci_alloc_control_pipe 0x00fefec0
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=28 align=10 ret=0x00fef990 (detail=0x00fefa80)
|00fec000| config_usb: 0x00fef99c
|00fec000| uhci_control 0x00fef99c
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=48 align=10 ret=0x00fef8b0 (detail=0x00fef8e0)
|00fe9000| pmm_free 0x00fef460 (detail=0x00fef4d0)
|00fe9000| device rev=0200 cls=09 sub=00 proto=02 size=40
|00fe9000| ehci_control 0x00fef53c
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef820 (detail=0x00fef880)
|00fe7000| set_address 0x00fefcf0
|00fed000| pmm_free 0x00fefb20 (detail=0x00fefba0)
|00fec000| pmm_free 0x00fed000 (detail=0x00fefda0)
\00fed000/ End thread
|00fec000| pmm_free 0x00fef8b0 (detail=0x00fef8e0)
|00fec000| device rev=0200 cls=00 sub=00 proto=00 size=08
|00fec000| uhci_control 0x00fef99c
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=64 align=10 ret=0x00fef8d0 (detail=0x00fefda0)
|00fe9000| pmm_free 0x00fef820 (detail=0x00fef880)
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=41 align=10 ret=0x00fefb10 (detail=0x00fefba0)
|00fe9000| ehci_control 0x00fef53c
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef840 (detail=0x00fef8a0)
|00fe7000| ehci_control 0x00fef97c
|00fe7000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef7a0 (detail=0x00fef810)
|00fec000| pmm_free 0x00fef8d0 (detail=0x00fefda0)
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=59 align=10 ret=0x00fef8d0 (detail=0x00fefda0)
|00fec000| uhci_control 0x00fef99c
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=160 align=10 ret=0x00fef6d0 (detail=0x00fef770)
|00fe9000| pmm_free 0x00fef840 (detail=0x00fef8a0)
|00fe9000| ehci_control 0x00fef53c
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef840 (detail=0x00fef8a0)
|00fe7000| pmm_free 0x00fef7a0 (detail=0x00fef810)
|00fec000| pmm_free 0x00fef6d0 (detail=0x00fef770)
|00fec000| uhci_control 0x00fef99c
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=32 align=10 ret=0x00fef7f0 (detail=0x00fef810)
|00fe9000| pmm_free 0x00fef840 (detail=0x00fef8a0)
|00fe9000| ehci_control 0x00fef53c
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef840 (detail=0x00fef8a0)
|00fe7000| ehci_alloc_control_pipe 0x00fefcf0
|00fe7000| pmm_malloc zone=0x000f59bc handle=ffffffff size=72 align=40 ret=0x00fef740 (detail=0x00fef7c0)
|00fe7000| config_usb: 0x00fef77c
|00fe7000| ehci_control 0x00fef77c
|00fe7000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef6e0 (detail=0x00fef790)
|00fec000| pmm_free 0x00fef7f0 (detail=0x00fef810)
|00fec000| usb_hid_init 0x00fef99c
|00fec000| uhci_control 0x00fef99c
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=32 align=10 ret=0x00fef7f0 (detail=0x00fef810)
|00fe9000| pmm_free 0x00fef840 (detail=0x00fef8a0)
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fed000 (detail=0x00fef8a0)
/00fed000\ Start thread
|00fed000| ehci_control 0x00fef53c
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef680 (detail=0x00fef870)
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fea000 (detail=0x00fef840)
/00fea000\ Start thread
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe8000 (detail=0x00fef650)
/00fe8000\ Start thread
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe6000 (detail=0x00fef620)
/00fe6000\ Start thread
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe5000 (detail=0x00fef5f0)
/00fe5000\ Start thread
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe4000 (detail=0x00fef5c0)
/00fe4000\ Start thread
|00fe9000| pmm_malloc zone=0x000f59bc handle=ffffffff size=4096 align=1000 ret=0x00fe3000 (detail=0x00fef590)
/00fe3000\ Start thread
|00fe7000| pmm_free 0x00fef6e0 (detail=0x00fef790)
|00fe7000| device rev=0200 cls=00 sub=00 proto=00 size=40
|00fe7000| ehci_control 0x00fef77c
|00fe7000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef6e0 (detail=0x00fef790)
|00fec000| pmm_free 0x00fef7f0 (detail=0x00fef810)
|00fec000| uhci_control 0x00fef99c
|00fec000| pmm_malloc zone=0x000f59bc handle=ffffffff size=32 align=10 ret=0x00fef7f0 (detail=0x00fef810)
|00fed000| pmm_free 0x00fef680 (detail=0x00fef870)
|00fea000| ehci_control 0x00fef53c
|00fea000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef680 (detail=0x00fef870)
|00fe7000| pmm_free 0x00fef6e0 (detail=0x00fef790)
|00fe7000| pmm_malloc zone=0x000f59bc handle=ffffffff size=60 align=10 ret=0x00fef700 (detail=0x00fef790)
|00fe7000| ehci_control 0x00fef77c
|00fe7000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef4a0 (detail=0x00fef560)
|00fec000| pmm_free 0x00fef7f0 (detail=0x00fef810)
|00fec000| uhci_alloc_intr_pipe 0x00fefec0 3
|00fec000| ebda moved from 9fc00 to 9f800
|00fec000| pmm_malloc zone=0x000f59ac handle=ffffffff size=28 align=10 ret=0x0009ffe0 (detail=0x00fef810)
|00fec000| pmm_malloc zone=0x000f59ac handle=ffffffff size=224 align=10 ret=0x0009ff00 (detail=0x00fef470)
|00fec000| pmm_malloc zone=0x000f59ac handle=ffffffff size=112 align=10 ret=0x0009fe90 (detail=0x00fef440)
|00fec000| USB keyboard initialized
|00fec000| pmm_free 0x00fef8d0 (detail=0x00fefda0)
|00fec000| uhci_free_pipe 0x00fef99c
|00fea000| pmm_free 0x00fef680 (detail=0x00fef870)
|00fe8000| ehci_control 0x00fef53c
|00fe8000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef6a0 (detail=0x00fefda0)
|00fe7000| pmm_free 0x00fef4a0 (detail=0x00fef560)
|00fe7000| pmm_free 0x00fef700 (detail=0x00fef790)
|00fe7000| ehci_free_pipe 0x00fef77c
|00fec000| pmm_free 0x00fef990 (detail=0x00fefa80)
|00fee000| pmm_free 0x00fec000 (detail=0x00fefd70)
\00fec000/ End thread
|00fee000| uhci_free_pipe 0x00fefa3c
|00fe8000| pmm_free 0x00fef6a0 (detail=0x00fefda0)
|00fe6000| ehci_control 0x00fef53c
|00fe6000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef6e0 (detail=0x00fefda0)
|00fe7000| pmm_free 0x00fef740 (detail=0x00fef7c0)
|00feb000| pmm_free 0x00fe7000 (detail=0x00fefb70)
\00fe7000/ End thread
|00fee000| pmm_free 0x00fefa30 (detail=0x00fefa50)
|00fed000| pmm_free 0x00fee000 (detail=0x00fefe90)
\00fee000/ End thread
|00fe6000| pmm_free 0x00fef6e0 (detail=0x00fefda0)
|00fe5000| ehci_control 0x00fef53c
|00fe5000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe5000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe4000| ehci_control 0x00fef53c
|00fe4000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe4000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe3000| ehci_control 0x00fef53c
|00fe3000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe3000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fed000| ehci_control 0x00fef53c
|00fed000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fed000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fea000| pmm_free 0x00fed000 (detail=0x00fef8a0)
\00fed000/ End thread
|00fea000| ehci_control 0x00fef53c
|00fea000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fea000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe8000| ehci_control 0x00fef53c
|00fe8000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe8000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe8000| ehci_control 0x00fef53c
|00fe8000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe8000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe8000| ehci_control 0x00fef53c
|00fe8000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe8000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe8000| set_address 0x00fefcf0
|00fe6000| ehci_control 0x00fef53c
|00fe6000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe8000| ehci_control 0x00fef97c
|00fe8000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fef8a0 (detail=0x00fefda0)
|00fe6000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe5000| pmm_free 0x00fe6000 (detail=0x00fef620)
\00fe6000/ End thread
|00fe5000| ehci_control 0x00fef53c
|00fe5000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe5000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe4000| pmm_free 0x00fe5000 (detail=0x00fef5f0)
\00fe5000/ End thread
|00fe4000| ehci_control 0x00fef53c
|00fe4000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe4000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe3000| pmm_free 0x00fe4000 (detail=0x00fef5c0)
\00fe4000/ End thread
|00fe3000| ehci_control 0x00fef53c
|00fe3000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe3000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe9000| pmm_free 0x00fe3000 (detail=0x00fef590)
\00fe3000/ End thread
|00fea000| ehci_control 0x00fef53c
|00fea000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fea000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe8000| pmm_free 0x00fea000 (detail=0x00fef840)
\00fea000/ End thread
|00fe8000| WARNING - Timeout at ehci_wait_qh:318!
|00fe8000| pmm_free 0x00fef8a0 (detail=0x00fefda0)
|00fe8000| ehci_control 0x00fef53c
|00fe8000| pmm_malloc zone=0x000f59bc handle=ffffffff size=96 align=20 ret=0x00fefa40 (detail=0x00fefe90)
|00fe8000| pmm_free 0x00fefa40 (detail=0x00fefe90)
|00fe9000| pmm_free 0x00fe8000 (detail=0x00fef650)
\00fe8000/ End thread
|00fe9000| Initialized USB HUB (0 ports used)
|00fe9000| pmm_free 0x00fefb10 (detail=0x00fefba0)
|00fe9000| ehci_free_pipe 0x00fef53c
|00fe9000| pmm_free 0x00fef500 (detail=0x00fef910)
|00feb000| pmm_free 0x00fe9000 (detail=0x00fefbd0)
\00fe9000/ End thread
|00feb000| ehci_free_pipe 0x00fef97c
|00feb000| pmm_free 0x00fef940 (detail=0x00fefc00)
|00feb000| pmm_free 0x00ffd000 (detail=0x00fefc90)
|00feb000| pmm_free 0x00ffff80 (detail=0x00fefc60)
|00feb000| pmm_free 0x00ffff40 (detail=0x00fefc30)
|00feb000| pmm_free 0x00fefcf0 (detail=0x00fefd40)
pmm_free 0x00feb000 (detail=0x00fefcc0)
\00feb000/ End thread
All threads complete.
Scan for option roms
Attempting to init PCI bdf 00:00.0 (vd 8086:7190)
Searching CBFS for prefix pci8086,7190.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:00.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:01.0 (vd 8086:7191)
Searching CBFS for prefix pci8086,7191.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:01.0
Skipping non-normal pci device (type=1)
Attempting to init PCI bdf 00:07.0 (vd 8086:7110)
Searching CBFS for prefix pci8086,7110.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:07.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:07.2 (vd 8086:7112)
Searching CBFS for prefix pci8086,7112.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:07.2
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:07.3 (vd 8086:7113)
Searching CBFS for prefix pci8086,7113.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:07.3
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:11.0 (vd 1095:3512)
Searching CBFS for prefix pci1095,3512.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:11.0
Option rom sizing returned f2400000 fff80000
Inspecting possible rom at 0xf2400000 (vd=1095:3512 bdf=00:11.0)
Copying option rom (size 43008) from 0xf2400000 to ce000
Checking rom 0x000ce000 (sig aa55 size 84)
Running option rom at ce00:0003
Attempting to init PCI bdf 00:12.0 (vd 3388:0021)
Searching CBFS for prefix pci3388,0021.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:12.0
Skipping non-normal pci device (type=1)
Attempting to init PCI bdf 00:13.0 (vd 1102:0002)
Searching CBFS for prefix pci1102,0002.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:13.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:13.1 (vd 1102:7002)
Searching CBFS for prefix pci1102,7002.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:13.1
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:14.0 (vd 8086:1229)
Searching CBFS for prefix pci8086,1229.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 00:14.0
Option rom sizing returned f2300000 fff00000
Inspecting possible rom at 0xf2300000 (vd=8086:1229 bdf=00:14.0)
Copying option rom (size 10240) from 0xf2300000 to d2800
Checking rom 0x000d2800 (sig aa55 size 20)
Running option rom at d280:0003
Attempting to init PCI bdf 02:08.0 (vd 1033:0035)
Searching CBFS for prefix pci1033,0035.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 02:08.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 02:08.1 (vd 1033:0035)
Searching CBFS for prefix pci1033,0035.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 02:08.1
Option rom sizing returned 0 0
Attempting to init PCI bdf 02:08.2 (vd 1033:00e0)
Searching CBFS for prefix pci1033,00e0.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 02:08.2
Option rom sizing returned 0 0
Attempting to init PCI bdf 02:0b.0 (vd 104c:8020)
Searching CBFS for prefix pci104c,8020.rom
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Attempting to map option rom on dev 02:0b.0
Option rom sizing returned 0 0
Searching CBFS for prefix genroms/
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Checking rom 0x000ce000 (sig aa55 size 36)
Checking rom 0x000d2800 (sig aa55 size 8)
Press F12 for boot menu.
Checking for bootsplash
Searching CBFS for prefix bootsplash.jpg
Found CBFS file fallback/romstage
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file
Running option rom at ce00:33e8
Running option rom at ce00:33e3
pmm_malloc zone=0x000f59b4 handle=ffffffff size=36 align=10 ret=0x000fdc70 (detail=0x00fefe90)
ebda moved from 9f000 to 9e800
pmm_malloc zone=0x000f59ac handle=ffffffff size=2048 align=10 ret=0x0009f690 (detail=0x00fefda0)
finalize PMM
malloc finalize
Add to e820 map: 0009e800 00001800 2
Add to e820 map: 00ff0000 0000e000 1
Returned 57344 bytes of ZoneHigh
e820 map has 5 items:
0: 0000000000000000 - 000000000009e800 = 1
1: 000000000009e800 - 00000000000a0000 = 2
2: 00000000000f0000 - 0000000000100000 = 2
3: 0000000000100000 - 0000000000ffe000 = 1
4: 0000000000ffe000 - 0000000001000000 = 2
Jump to int19
enter handle_19:
NULL
Booting from Floppy...
invalid handle_legacy_disk:809:
a=00000201 b=00000000 c=00000001 d=00000000 ds=0000 es=07c0 ss=0000
si=00000000 di=00000000 bp=00000000 sp=00006f36 cs=ce00 ip=1a5c f=0002
Boot failed: could not read the boot disk
enter handle_18:
NULL
Booting from DVD/CD...
atapi_is_ready (drive=0x000fdca0)
send_atapi_cmd : read error (status=51 err=60)
Device reports MEDIUM NOT PRESENT
atapi_is_ready returned -1
Boot failed: Could not read from CDROM (code 0003)
enter handle_18:
NULL
Booting from Hard Disk...
Booting from 0000:7c00
enter handle_12:
a=00000000 b=00000000 c=00000000 d=00000080 ds=0000 es=0000 ss=0000
si=00002118 di=00004300 bp=00001ff0 sp=00001ff4 cs=0000 ip=24c1 f=0297
enter handle_12:
a=00000000 b=00000000 c=00000000 d=00022080 ds=0000 es=0000 ss=0000
si=00002118 di=00054004 bp=00001ff0 sp=00001ff4 cs=0000 ip=8a01 f=0297
invalid handle_legacy_disk:809:
a=00004100 b=000655aa c=00000000 d=00000082 ds=0000 es=0000 ss=0000
si=00067fb8 di=00000082 bp=00001ff0 sp=00001fee cs=ce00 ip=1a5c f=0046
invalid handle_legacy_disk:809:
a=00000800 b=00067fb8 c=00000000 d=00000082 ds=0000 es=0000 ss=0000
si=00000000 di=00000082 bp=00001ff0 sp=00001fee cs=ce00 ip=1a5c f=0046
unimplemented handle_15XX:338:
a=000000c0 b=00000000 c=00000000 d=00000082 ds=0000 es=0000 ss=0000
si=00067fb8 di=00000082 bp=00001ff0 sp=00001ff4 cs=0000 ip=8ab6 f=0246
invalid handle_legacy_disk:809:
a=00000000 b=00009000 c=00000000 d=00000000 ds=0000 es=0000 ss=0000
si=004d0440 di=0009a000 bp=00001ff0 sp=00001fee cs=ce00 ip=1a5c f=0046
unimplemented handle_16XX:231:
a=00000305 b=00000000 c=00000000 d=00000000 ds=9000 es=9000 ss=9000
si=00000000 di=00000000 bp=00000000 sp=00008f44 cs=9000 ip=05ec f=0003
unimplemented handle_15XX:338:
a=0000e980 b=00000000 c=00000000 d=47534943 ds=9000 es=9000 ss=9000
si=00000000 di=00000000 bp=00000000 sp=00008f44 cs=9000 ip=05ec f=0003
coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 starting...
DIMM 0: 50
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 20 30 40 50 60 70 80 00 b0 2a 00 a0 aa 00 00
70: 00 1f 02 38 aa aa 00 00 00 ff 10 38 10 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c fe ff 7f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
Found DIMM in slot 3
PGPOL[BPR] has been set to 0xff
RPS has been set to 0xaaaa
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
Enabling refresh (DRAMC = 0x09) for DIMM 00
Enabling refresh (DRAMC = 0x09) for DIMM 01
Enabling refresh (DRAMC = 0x09) for DIMM 02
Enabling refresh (DRAMC = 0x09) for DIMM 03
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 20 30 40 50 60 70 80 00 b0 2a 00 a0 aa 00 00
70: 00 1f 02 38 aa aa 00 00 00 ff 10 38 10 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c fe ff 7f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Loading image.
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (212992 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
POST: 0x80
POST: 0x39
coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 booting...
POST: 0x40
clocks_per_usec: 753
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
Compare with tree...
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
POST: 0x5f
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/7190] ops
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:07.0 [8086/7110] bus ops
PCI: 00:07.0 [8086/7110] enabled
PCI: 00:07.1 [8086/7111] ops
PCI: 00:07.1 [8086/7111] enabled
PCI: 00:07.2 [8086/7112] ops
PCI: 00:07.2 [8086/7112] enabled
PCI: 00:07.3 [8086/7113] bus ops
pwrmgt_enable: gpo default missing in devicetree.cb!
PCI: 00:07.3 [8086/7113] enabled
malloc Enter, size 68, free_mem_ptr 00130000
malloc 00130000
PCI: 00:11.0 [1095/3512] enabled
malloc Enter, size 68, free_mem_ptr 00130044
malloc 00130044
Capability: type 0x01 @ 0x80
Capability: type 0x06 @ 0x90
Capability: type 0x03 @ 0xa0
Capability: type 0x01 @ 0x80
Capability: type 0x06 @ 0x90
Capability: type 0x03 @ 0xa0
PCI: 00:12.0 [3388/0021] enabled
malloc Enter, size 68, free_mem_ptr 00130088
malloc 00130088
PCI: 00:13.0 [1102/0002] enabled
malloc Enter, size 68, free_mem_ptr 001300cc
malloc 001300cc
PCI: 00:13.1 [1102/7002] enabled
malloc Enter, size 68, free_mem_ptr 00130110
malloc 00130110
PCI: 00:14.0 [8086/1229] enabled
POST: 0x25
do_pci_scan_bridge for PCI: 00:01.0
malloc Enter, size 24, free_mem_ptr 00130154
malloc 00130154
PCI: pci_scan_bus for bus 01
POST: 0x24
malloc Enter, size 68, free_mem_ptr 0013016c
malloc 0013016c
PCI: 01:00.0 [10de/02e1] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=001
POST: 0x55
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:07.0
malloc Enter, size 2560, free_mem_ptr 001301b0
malloc 001301b0
PNP: 002e.0 enabled
PNP: 002e.1 enabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.4 enabled
PNP: 002e.5 enabled
PNP: 002e.6 enabled
scan_static_bus for PCI: 00:07.0 done
scan_static_bus for PCI: 00:07.3
scan_static_bus for PCI: 00:07.3 done
do_pci_scan_bridge for PCI: 00:12.0
malloc Enter, size 24, free_mem_ptr 00130bb0
malloc 00130bb0
PCI: pci_scan_bus for bus 02
POST: 0x24
malloc Enter, size 68, free_mem_ptr 00130bc8
malloc 00130bc8
PCI: 02:08.0 [1033/0035] enabled
malloc Enter, size 68, free_mem_ptr 00130c0c
malloc 00130c0c
PCI: 02:08.1 [1033/0035] enabled
malloc Enter, size 68, free_mem_ptr 00130c50
malloc 00130c50
PCI: 02:08.2 [1033/00e0] enabled
malloc Enter, size 68, free_mem_ptr 00130c94
malloc 00130c94
PCI: 02:0b.0 [104c/8020] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
do_pci_scan_bridge returns max 2
PCI: pci_scan_bus returning with max=002
POST: 0x55
scan_static_bus for Root Device done
done
POST: 0x66
Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:07.0 read_resources bus 0 link: 0
PNP: 002e.4 missing read_resources
PCI: 00:07.0 read_resources bus 0 link: 0 done
PCI: 00:12.0 read_resources bus 2 link: 0
PCI: 00:12.0 read_resources bus 2 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
PCI: 00:01.0 child on link 0 PCI: 01:00.0
PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
PCI: 01:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 14
PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 18
PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
PCI: 00:07.0 child on link 0 PNP: 002e.0
PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
PNP: 002e.0
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags c0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.4
PNP: 002e.5
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.6
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PCI: 00:07.1
PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:07.2
PCI: 00:07.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:07.3
PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 200 align 9 gran 9 limit ffffffff flags 200 index 24
PCI: 00:11.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30
PCI: 00:12.0 child on link 0 PCI: 02:08.0
PCI: 00:12.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:12.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:12.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:08.0
PCI: 02:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 02:08.1
PCI: 02:08.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 02:08.2
PCI: 02:08.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
PCI: 02:0b.0
PCI: 02:0b.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10
PCI: 02:0b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:14.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 14
PCI: 00:14.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
PCI: 00:14.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 2200 index 30
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:12.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:12.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.0 14 * [0x0 - 0x3f] io
PCI: 00:07.2 20 * [0x40 - 0x5f] io
PCI: 00:13.0 10 * [0x60 - 0x7f] io
PCI: 00:07.1 20 * [0x80 - 0x8f] io
PCI: 00:11.0 20 * [0x90 - 0x9f] io
PCI: 00:11.0 10 * [0xa0 - 0xa7] io
PCI: 00:11.0 18 * [0xa8 - 0xaf] io
PCI: 00:13.1 10 * [0xb0 - 0xb7] io
PCI: 00:11.0 14 * [0xb8 - 0xbb] io
PCI: 00:11.0 1c * [0xbc - 0xbf] io
PCI_DOMAIN: 0000 compute_resources_io: base: c0 size: c0 align: 6 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 14 * [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 compute_resources_prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xffffff] mem
PCI: 01:00.0 18 * [0x1000000 - 0x1ffffff] mem
PCI: 01:00.0 30 * [0x2000000 - 0x201ffff] mem
PCI: 00:01.0 compute_resources_mem: base: 2020000 size: 2100000 align: 24 gran: 20 limit: ffffffff done
PCI: 00:12.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:12.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:12.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:0b.0 14 * [0x0 - 0x3fff] mem
PCI: 02:08.0 10 * [0x4000 - 0x4fff] mem
PCI: 02:08.1 10 * [0x5000 - 0x5fff] mem
PCI: 02:0b.0 10 * [0x6000 - 0x67ff] mem
PCI: 02:08.2 10 * [0x6800 - 0x68ff] mem
PCI: 00:12.0 compute_resources_mem: base: 6900 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 10 * [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 24 * [0x10000000 - 0x1fffffff] prefmem
PCI: 00:01.0 20 * [0x20000000 - 0x220fffff] mem
PCI: 00:12.0 20 * [0x22100000 - 0x221fffff] mem
PCI: 00:14.0 18 * [0x22200000 - 0x222fffff] mem
PCI: 00:14.0 30 * [0x22300000 - 0x223fffff] mem
PCI: 00:11.0 30 * [0x22400000 - 0x2247ffff] mem
PCI: 00:14.0 10 * [0x22480000 - 0x22480fff] mem
PCI: 00:11.0 24 * [0x22481000 - 0x224811ff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 22481200 size: 22481200 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:07.0
constrain_resources: PNP: 002e.0
constrain_resources: PNP: 002e.1
constrain_resources: PNP: 002e.2
constrain_resources: PNP: 002e.3
constrain_resources: PNP: 002e.4
constrain_resources: PNP: 002e.5
constrain_resources: PNP: 002e.6
constrain_resources: PCI: 00:07.1
constrain_resources: PCI: 00:07.2
constrain_resources: PCI: 00:07.3
constrain_resources: PCI: 00:11.0
constrain_resources: PCI: 00:12.0
constrain_resources: PCI: 02:08.0
constrain_resources: PCI: 02:08.1
constrain_resources: PCI: 02:08.2
constrain_resources: PCI: 02:0b.0
constrain_resources: PCI: 00:13.0
constrain_resources: PCI: 00:13.1
constrain_resources: PCI: 00:14.0
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000e3ff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
lim->base 00000000 lim->limit ff7fffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:c0 align:6 gran:0 limit:e3ff
Assigned: PCI: 00:14.0 14 * [0x1000 - 0x103f] io
Assigned: PCI: 00:07.2 20 * [0x1040 - 0x105f] io
Assigned: PCI: 00:13.0 10 * [0x1060 - 0x107f] io
Assigned: PCI: 00:07.1 20 * [0x1080 - 0x108f] io
Assigned: PCI: 00:11.0 20 * [0x1090 - 0x109f] io
Assigned: PCI: 00:11.0 10 * [0x10a0 - 0x10a7] io
Assigned: PCI: 00:11.0 18 * [0x10a8 - 0x10af] io
Assigned: PCI: 00:13.1 10 * [0x10b0 - 0x10b7] io
Assigned: PCI: 00:11.0 14 * [0x10b8 - 0x10bb] io
Assigned: PCI: 00:11.0 1c * [0x10bc - 0x10bf] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 10c0 size: c0 align: 6 gran: 0 done
PCI: 00:01.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:01.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI: 00:12.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:12.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:22481200 align:28 gran:0 limit:ff7fffff
Assigned: PCI: 00:00.0 10 * [0xd0000000 - 0xdfffffff] prefmem
Assigned: PCI: 00:01.0 24 * [0xe0000000 - 0xefffffff] prefmem
Assigned: PCI: 00:01.0 20 * [0xf0000000 - 0xf20fffff] mem
Assigned: PCI: 00:12.0 20 * [0xf2100000 - 0xf21fffff] mem
Assigned: PCI: 00:14.0 18 * [0xf2200000 - 0xf22fffff] mem
Assigned: PCI: 00:14.0 30 * [0xf2300000 - 0xf23fffff] mem
Assigned: PCI: 00:11.0 30 * [0xf2400000 - 0xf247ffff] mem
Assigned: PCI: 00:14.0 10 * [0xf2480000 - 0xf2480fff] mem
Assigned: PCI: 00:11.0 24 * [0xf2481000 - 0xf24811ff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f2481200 size: 22481200 align: 28 gran: 0 done
PCI: 00:01.0 allocate_resources_prefmem: base:e0000000 size:10000000 align:28 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 14 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:01.0 allocate_resources_prefmem: next_base: f0000000 size: 10000000 align: 28 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:f0000000 size:2100000 align:24 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 10 * [0xf0000000 - 0xf0ffffff] mem
Assigned: PCI: 01:00.0 18 * [0xf1000000 - 0xf1ffffff] mem
Assigned: PCI: 01:00.0 30 * [0xf2000000 - 0xf201ffff] mem
PCI: 00:01.0 allocate_resources_mem: next_base: f2020000 size: 2100000 align: 24 gran: 20 done
PCI: 00:12.0 allocate_resources_prefmem: base:ff7fffff size:0 align:20 gran:20 limit:ff7fffff
PCI: 00:12.0 allocate_resources_prefmem: next_base: ff7fffff size: 0 align: 20 gran: 20 done
PCI: 00:12.0 allocate_resources_mem: base:f2100000 size:100000 align:20 gran:20 limit:ff7fffff
Assigned: PCI: 02:0b.0 14 * [0xf2100000 - 0xf2103fff] mem
Assigned: PCI: 02:08.0 10 * [0xf2104000 - 0xf2104fff] mem
Assigned: PCI: 02:08.1 10 * [0xf2105000 - 0xf2105fff] mem
Assigned: PCI: 02:0b.0 10 * [0xf2106000 - 0xf21067ff] mem
Assigned: PCI: 02:08.2 10 * [0xf2106800 - 0xf21068ff] mem
PCI: 00:12.0 allocate_resources_mem: next_base: f2106900 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 1024 MB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f0000000 - 0x00f20fffff] size 0x02100000 gran 0x14 bus 01 mem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f0ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 01:00.0 18 <- [0x00f1000000 - 0x00f1ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 30 <- [0x00f2000000 - 0x00f201ffff] size 0x00020000 gran 0x11 romem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 00:07.0 assign_resources, bus 0 link: 0
PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 002e.1 60 <- [0x0000000378 - 0x0000000777] size 0x00000400 gran 0x0a io
PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned
PNP: 002e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.2 74 drq size: 0x0000000001 not assigned
ERROR: PNP: 002e.2 75 drq size: 0x0000000001 not assigned
PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.6 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io
PNP: 002e.6 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io
PNP: 002e.6 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PCI: 00:07.0 assign_resources, bus 0 link: 0
PCI: 00:07.1 20 <- [0x0000001080 - 0x000000108f] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:11.0 10 <- [0x00000010a0 - 0x00000010a7] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x00000010b8 - 0x00000010bb] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x00000010a8 - 0x00000010af] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x00000010bc - 0x00000010bf] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000001090 - 0x000000109f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f2481000 - 0x00f24811ff] size 0x00000200 gran 0x09 mem
PCI: 00:11.0 30 <- [0x00f2400000 - 0x00f247ffff] size 0x00080000 gran 0x13 romem
PCI: 00:12.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:12.0 24 <- [0x00ff7fffff - 0x00ff7ffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:12.0 20 <- [0x00f2100000 - 0x00f21fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:12.0 assign_resources, bus 2 link: 0
PCI: 02:08.0 10 <- [0x00f2104000 - 0x00f2104fff] size 0x00001000 gran 0x0c mem
PCI: 02:08.1 10 <- [0x00f2105000 - 0x00f2105fff] size 0x00001000 gran 0x0c mem
PCI: 02:08.2 10 <- [0x00f2106800 - 0x00f21068ff] size 0x00000100 gran 0x08 mem
PCI: 02:0b.0 10 <- [0x00f2106000 - 0x00f21067ff] size 0x00000800 gran 0x0b mem
PCI: 02:0b.0 14 <- [0x00f2100000 - 0x00f2103fff] size 0x00004000 gran 0x0e mem
PCI: 00:12.0 assign_resources, bus 2 link: 0
PCI: 00:13.0 10 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
PCI: 00:13.1 10 <- [0x00000010b0 - 0x00000010b7] size 0x00000008 gran 0x03 io
PCI: 00:14.0 10 <- [0x00f2480000 - 0x00f2480fff] size 0x00001000 gran 0x0c mem
PCI: 00:14.0 14 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:14.0 18 <- [0x00f2200000 - 0x00f22fffff] size 0x00100000 gran 0x14 mem
PCI: 00:14.0 30 <- [0x00f2300000 - 0x00f23fffff] size 0x00100000 gran 0x14 romem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 1000 size c0 align 6 gran 0 limit e3ff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base d0000000 size 22481200 align 28 gran 0 limit ff7fffff flags 40040200 index 10000100
PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
PCI_DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index b
PCI: 00:00.0
PCI: 00:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 10
PCI: 00:01.0 child on link 0 PCI: 01:00.0
PCI: 00:01.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 20 limit ff7fffff flags 60081202 index 24
PCI: 00:01.0 resource base f0000000 size 2100000 align 24 gran 20 limit ff7fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base f0000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 10
PCI: 01:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 14
PCI: 01:00.0 resource base f1000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 18
PCI: 01:00.0 resource base f2000000 size 20000 align 17 gran 17 limit ff7fffff flags 60002200 index 30
PCI: 00:07.0 child on link 0 PNP: 002e.0
PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
PNP: 002e.0
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags e0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.4
PNP: 002e.5
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.6
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PCI: 00:07.1
PCI: 00:07.1 resource base 1080 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
PCI: 00:07.2
PCI: 00:07.2 resource base 1040 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20
PCI: 00:07.3
PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
PCI: 00:11.0
PCI: 00:11.0 resource base 10a0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
PCI: 00:11.0 resource base 10b8 size 4 align 2 gran 2 limit e3ff flags 60000100 index 14
PCI: 00:11.0 resource base 10a8 size 8 align 3 gran 3 limit e3ff flags 60000100 index 18
PCI: 00:11.0 resource base 10bc size 4 align 2 gran 2 limit e3ff flags 60000100 index 1c
PCI: 00:11.0 resource base 1090 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
PCI: 00:11.0 resource base f2481000 size 200 align 9 gran 9 limit ff7fffff flags 60000200 index 24
PCI: 00:11.0 resource base f2400000 size 80000 align 19 gran 19 limit ff7fffff flags 60002200 index 30
PCI: 00:12.0 child on link 0 PCI: 02:08.0
PCI: 00:12.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
PCI: 00:12.0 resource base ff7fffff size 0 align 20 gran 20 limit ff7fffff flags 60081202 index 24
PCI: 00:12.0 resource base f2100000 size 100000 align 20 gran 20 limit ff7fffff flags 60080202 index 20
PCI: 02:08.0
PCI: 02:08.0 resource base f2104000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 02:08.1
PCI: 02:08.1 resource base f2105000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 02:08.2
PCI: 02:08.2 resource base f2106800 size 100 align 8 gran 8 limit ff7fffff flags 60000200 index 10
PCI: 02:0b.0
PCI: 02:0b.0 resource base f2106000 size 800 align 11 gran 11 limit ff7fffff flags 60000200 index 10
PCI: 02:0b.0 resource base f2100000 size 4000 align 14 gran 14 limit ff7fffff flags 60000200 index 14
PCI: 00:13.0
PCI: 00:13.0 resource base 1060 size 20 align 5 gran 5 limit e3ff flags 60000100 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 10b0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base f2480000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 00:14.0 resource base 1000 size 40 align 6 gran 6 limit e3ff flags 60000100 index 14
PCI: 00:14.0 resource base f2200000 size 100000 align 20 gran 20 limit ff7fffff flags 60000200 index 18
PCI: 00:14.0 resource base f2300000 size 100000 align 20 gran 20 limit ff7fffff flags 60002200 index 30
Done allocating resources.
POST: 0x88
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 008b
PCI: 00:01.0 cmd <- 07
PCI: 00:07.0 cmd <- 0f
PCI: 00:07.1 cmd <- 05
PCI: 00:07.2 cmd <- 05
PCI: 00:07.3 cmd <- 01
PCI: 00:11.0 cmd <- 07
PCI: 00:12.0 bridge ctrl <- 0003
PCI: 00:12.0 cmd <- 06
PCI: 00:13.0 cmd <- 01
PCI: 00:13.1 cmd <- 01
PCI: 00:14.0 cmd <- 03
PCI: 01:00.0 cmd <- 03
PCI: 02:08.0 cmd <- 02
PCI: 02:08.1 cmd <- 02
PCI: 02:08.2 cmd <- 06
PCI: 02:0b.0 cmd <- 02
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
malloc Enter, size 68, free_mem_ptr 00130cd8
malloc 00130cd8
Initializing CPU #0
CPU: vendor Intel device 686
CPU: family 06, model 08, stepping 06
POST: 0x60
Enabling cache
Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB
ADDRESS_MASK_HIGH=0xf
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
POST: 0x6a
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
microcode_info: sig = 0x00000686 pf=0x00000010 rev = 0x00000000
Disabling local apic...done.
POST: 0x9b
CPU #0 initialized
PCI: 00:00.0 init
Northbridge Init
PCI: 00:07.0 init
RTC Init
PCI: 00:07.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: off
IDE: Primary IDE interface, drive 1: UDMA/33: off
IDE: Secondary IDE interface, drive 0: UDMA/33: off
IDE: Secondary IDE interface, drive 1: UDMA/33: off
PCI: 00:07.2 init
PCI: 00:11.0 init
PCI: 00:13.0 init
PCI: 00:13.1 init
PCI: 00:14.0 init
PCI: 01:00.0 init
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
CBFS: follow chain: fffc34c0 + 38 + 148d7 + align -> fffd7e00
Check fallback/payload
CBFS: follow chain: fffd7e00 + 38 + bd99 + align -> fffe3c00
Check
CBFS: follow chain: fffe3c00 + 28 + 1c076 + align -> fffffcc0
CBFS: Could not find file pci10de,02e1.rom
On card, ROM address for PCI: 01:00.0 = f2000000
PCI expansion ROM, signature 0xaa55, INIT size 0xee00, data ptr 0x00b8
PCI ROM image, vendor ID 10de, device ID 02e1,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from f2000000 to 0xc0000, 0xee00 bytes
Real mode stub @00000600: 606 bytes
Calling Option ROM...
... Option ROM returned.
PNP: 002e.0 init
PNP: 002e.1 init
PNP: 002e.2 init
PNP: 002e.3 init
PNP: 002e.5 init
PNP: 002e.6 init
Keyboard init...
No PS/2 keyboard detected.
PCI: 02:08.0 init
PCI: 02:08.1 init
PCI: 02:08.2 init
PCI: 02:0b.0 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:14.0: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:08.0: enabled 1
PCI: 02:08.1: enabled 1
PCI: 02:08.2: enabled 1
PCI: 02:0b.0: enabled 1
CPU: 00: enabled 1
POST: 0x89
Initializing CBMEM area to 0x3fff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 3fff0200...ok
High Tables Base is 3fff0000.
POST: 0x9d
Adding CBMEM entry as no. 2
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518 checksum bbdf
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x3fff0400
rom_table_end = 0x3fff0400
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x3fff0400 to 0x40000000
Adding high table area
coreboot memory table:
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-000000003ffeffff: RAM
3. 000000003fff0000-000000003fffffff: CONFIGURATION TABLES
4. 00000000ff800000-00000000ffffffff: RESERVED
Wrote coreboot table at: 3fff0400 - 3fff05ac checksum 2d4d
coreboot table: 428 bytes.
POST: 0x9e
POST: 0x9d
Multiboot Information structure has been written.
0. FREE SPACE 3fff2400 0000dc00
1. GDT 3fff0200 00000200
2. COREBOOT 3fff0400 00002000
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
CBFS: follow chain: fffc34c0 + 38 + 148d7 + align -> fffd7e00
Check fallback/payload
Got a payload
Loading segment from rom address 0xfffd7e38
data (compression=1)
malloc Enter, size 36, free_mem_ptr 00130d1c
malloc 00130d1c
New segment dstaddr 0xe7c70 memsize 0x18390 srcaddr 0xfffd7e70 filesize 0xbd61
(cleaned up) New segment addr 0xe7c70 size 0x18390 offset 0xfffd7e70 filesize 0xbd61
Loading segment from rom address 0xfffd7e54
Entry Point 0x000fc1a9
Loading Segment: addr: 0x00000000000e7c70 memsz: 0x0000000000018390 filesz: 0x000000000000bd61
lb: [0x0000000000100000, 0x0000000000134000)
Post relocation: addr: 0x00000000000e7c70 memsz: 0x0000000000018390 filesz: 0x000000000000bd61
using LZMA
[ 0x000e7c70, 00100000, 0x00100000) <- fffd7e70
dest 000e7c70, end 00100000, bouncebuffer 3ff88000
Loaded segments
Jumping to boot code at fc1a9
POST: 0xfe
entry = 0x000fc1a9
lb_start = 0x00100000
lb_size = 0x00034000
adjust = 0x3febc000
buffer = 0x3ff88000
elf_boot_notes = 0x001246fc
adjusted_boot_notes = 0x3ffe06fc
-------------- next part --------------
coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 starting...
DIMM 0: 50
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 00 00 00
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 04 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00
60: 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00
70: 00 1f 02 38 00 00 00 00 00 00 00 38 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
Found DIMM in slot 3
PGPOL[BPR] has been set to 0xff
RPS has been set to 0xaaaa
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
Enabling refresh (DRAMC = 0x09) for DIMM 00
Enabling refresh (DRAMC = 0x09) for DIMM 01
Enabling refresh (DRAMC = 0x09) for DIMM 02
Enabling refresh (DRAMC = 0x09) for DIMM 03
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 00 00 00
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 20 30 40 50 60 70 80 00 b0 2a 00 a0 aa 00 00
70: 00 1f 02 38 aa aa 00 00 00 ff 10 38 10 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c fe ff 7f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Loading image.
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (212992 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
POST: 0x80
POST: 0x39
coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 booting...
POST: 0x40
clocks_per_usec: 753
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
Compare with tree...
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
POST: 0x5f
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/7190] ops
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:07.0 [8086/7110] bus ops
PCI: 00:07.0 [8086/7110] enabled
PCI: 00:07.1 [8086/7111] ops
PCI: 00:07.1 [8086/7111] enabled
PCI: 00:07.2 [8086/7112] ops
PCI: 00:07.2 [8086/7112] enabled
PCI: 00:07.3 [8086/7113] bus ops
pwrmgt_enable: gpo default missing in devicetree.cb!
PCI: 00:07.3 [8086/7113] enabled
malloc Enter, size 68, free_mem_ptr 00130000
malloc 00130000
PCI: 00:11.0 [1095/3512] enabled
malloc Enter, size 68, free_mem_ptr 00130044
malloc 00130044
Capability: type 0x01 @ 0x80
Capability: type 0x06 @ 0x90
Capability: type 0x03 @ 0xa0
Capability: type 0x01 @ 0x80
Capability: type 0x06 @ 0x90
Capability: type 0x03 @ 0xa0
PCI: 00:12.0 [3388/0021] enabled
malloc Enter, size 68, free_mem_ptr 00130088
malloc 00130088
PCI: 00:13.0 [1102/0002] enabled
malloc Enter, size 68, free_mem_ptr 001300cc
malloc 001300cc
PCI: 00:13.1 [1102/7002] enabled
malloc Enter, size 68, free_mem_ptr 00130110
malloc 00130110
PCI: 00:14.0 [8086/1229] enabled
POST: 0x25
do_pci_scan_bridge for PCI: 00:01.0
malloc Enter, size 24, free_mem_ptr 00130154
malloc 00130154
PCI: pci_scan_bus for bus 01
POST: 0x24
malloc Enter, size 68, free_mem_ptr 0013016c
malloc 0013016c
PCI: 01:00.0 [10de/02e1] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=001
POST: 0x55
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:07.0
malloc Enter, size 2560, free_mem_ptr 001301b0
malloc 001301b0
PNP: 002e.0 enabled
PNP: 002e.1 enabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.4 enabled
PNP: 002e.5 enabled
PNP: 002e.6 enabled
scan_static_bus for PCI: 00:07.0 done
scan_static_bus for PCI: 00:07.3
scan_static_bus for PCI: 00:07.3 done
do_pci_scan_bridge for PCI: 00:12.0
malloc Enter, size 24, free_mem_ptr 00130bb0
malloc 00130bb0
PCI: pci_scan_bus for bus 02
POST: 0x24
malloc Enter, size 68, free_mem_ptr 00130bc8
malloc 00130bc8
PCI: 02:08.0 [1033/0035] enabled
malloc Enter, size 68, free_mem_ptr 00130c0c
malloc 00130c0c
PCI: 02:08.1 [1033/0035] enabled
malloc Enter, size 68, free_mem_ptr 00130c50
malloc 00130c50
PCI: 02:08.2 [1033/00e0] enabled
malloc Enter, size 68, free_mem_ptr 00130c94
malloc 00130c94
PCI: 02:0b.0 [104c/8020] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
do_pci_scan_bridge returns max 2
PCI: pci_scan_bus returning with max=002
POST: 0x55
scan_static_bus for Root Device done
done
POST: 0x66
Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:07.0 read_resources bus 0 link: 0
PNP: 002e.4 missing read_resources
PCI: 00:07.0 read_resources bus 0 link: 0 done
PCI: 00:12.0 read_resources bus 2 link: 0
PCI: 00:12.0 read_resources bus 2 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
PCI: 00:01.0 child on link 0 PCI: 01:00.0
PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
PCI: 01:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 14
PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 18
PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
PCI: 00:07.0 child on link 0 PNP: 002e.0
PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
PNP: 002e.0
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags c0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.4
PNP: 002e.5
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.6
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PCI: 00:07.1
PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:07.2
PCI: 00:07.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:07.3
PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 200 align 9 gran 9 limit ffffffff flags 200 index 24
PCI: 00:11.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30
PCI: 00:12.0 child on link 0 PCI: 02:08.0
PCI: 00:12.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:12.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:12.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:08.0
PCI: 02:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 02:08.1
PCI: 02:08.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 02:08.2
PCI: 02:08.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
PCI: 02:0b.0
PCI: 02:0b.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10
PCI: 02:0b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:14.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 14
PCI: 00:14.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
PCI: 00:14.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 2200 index 30
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:12.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:12.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.0 14 * [0x0 - 0x3f] io
PCI: 00:07.2 20 * [0x40 - 0x5f] io
PCI: 00:13.0 10 * [0x60 - 0x7f] io
PCI: 00:07.1 20 * [0x80 - 0x8f] io
PCI: 00:11.0 20 * [0x90 - 0x9f] io
PCI: 00:11.0 10 * [0xa0 - 0xa7] io
PCI: 00:11.0 18 * [0xa8 - 0xaf] io
PCI: 00:13.1 10 * [0xb0 - 0xb7] io
PCI: 00:11.0 14 * [0xb8 - 0xbb] io
PCI: 00:11.0 1c * [0xbc - 0xbf] io
PCI_DOMAIN: 0000 compute_resources_io: base: c0 size: c0 align: 6 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 14 * [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 compute_resources_prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xffffff] mem
PCI: 01:00.0 18 * [0x1000000 - 0x1ffffff] mem
PCI: 01:00.0 30 * [0x2000000 - 0x201ffff] mem
PCI: 00:01.0 compute_resources_mem: base: 2020000 size: 2100000 align: 24 gran: 20 limit: ffffffff done
PCI: 00:12.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:12.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:12.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:0b.0 14 * [0x0 - 0x3fff] mem
PCI: 02:08.0 10 * [0x4000 - 0x4fff] mem
PCI: 02:08.1 10 * [0x5000 - 0x5fff] mem
PCI: 02:0b.0 10 * [0x6000 - 0x67ff] mem
PCI: 02:08.2 10 * [0x6800 - 0x68ff] mem
PCI: 00:12.0 compute_resources_mem: base: 6900 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 10 * [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 24 * [0x10000000 - 0x1fffffff] prefmem
PCI: 00:01.0 20 * [0x20000000 - 0x220fffff] mem
PCI: 00:12.0 20 * [0x22100000 - 0x221fffff] mem
PCI: 00:14.0 18 * [0x22200000 - 0x222fffff] mem
PCI: 00:14.0 30 * [0x22300000 - 0x223fffff] mem
PCI: 00:11.0 30 * [0x22400000 - 0x2247ffff] mem
PCI: 00:14.0 10 * [0x22480000 - 0x22480fff] mem
PCI: 00:11.0 24 * [0x22481000 - 0x224811ff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 22481200 size: 22481200 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:07.0
constrain_resources: PNP: 002e.0
constrain_resources: PNP: 002e.1
constrain_resources: PNP: 002e.2
constrain_resources: PNP: 002e.3
constrain_resources: PNP: 002e.4
constrain_resources: PNP: 002e.5
constrain_resources: PNP: 002e.6
constrain_resources: PCI: 00:07.1
constrain_resources: PCI: 00:07.2
constrain_resources: PCI: 00:07.3
constrain_resources: PCI: 00:11.0
constrain_resources: PCI: 00:12.0
constrain_resources: PCI: 02:08.0
constrain_resources: PCI: 02:08.1
constrain_resources: PCI: 02:08.2
constrain_resources: PCI: 02:0b.0
constrain_resources: PCI: 00:13.0
constrain_resources: PCI: 00:13.1
constrain_resources: PCI: 00:14.0
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000e3ff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
lim->base 00000000 lim->limit ff7fffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:c0 align:6 gran:0 limit:e3ff
Assigned: PCI: 00:14.0 14 * [0x1000 - 0x103f] io
Assigned: PCI: 00:07.2 20 * [0x1040 - 0x105f] io
Assigned: PCI: 00:13.0 10 * [0x1060 - 0x107f] io
Assigned: PCI: 00:07.1 20 * [0x1080 - 0x108f] io
Assigned: PCI: 00:11.0 20 * [0x1090 - 0x109f] io
Assigned: PCI: 00:11.0 10 * [0x10a0 - 0x10a7] io
Assigned: PCI: 00:11.0 18 * [0x10a8 - 0x10af] io
Assigned: PCI: 00:13.1 10 * [0x10b0 - 0x10b7] io
Assigned: PCI: 00:11.0 14 * [0x10b8 - 0x10bb] io
Assigned: PCI: 00:11.0 1c * [0x10bc - 0x10bf] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 10c0 size: c0 align: 6 gran: 0 done
PCI: 00:01.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:01.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI: 00:12.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:12.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:22481200 align:28 gran:0 limit:ff7fffff
Assigned: PCI: 00:00.0 10 * [0xd0000000 - 0xdfffffff] prefmem
Assigned: PCI: 00:01.0 24 * [0xe0000000 - 0xefffffff] prefmem
Assigned: PCI: 00:01.0 20 * [0xf0000000 - 0xf20fffff] mem
Assigned: PCI: 00:12.0 20 * [0xf2100000 - 0xf21fffff] mem
Assigned: PCI: 00:14.0 18 * [0xf2200000 - 0xf22fffff] mem
Assigned: PCI: 00:14.0 30 * [0xf2300000 - 0xf23fffff] mem
Assigned: PCI: 00:11.0 30 * [0xf2400000 - 0xf247ffff] mem
Assigned: PCI: 00:14.0 10 * [0xf2480000 - 0xf2480fff] mem
Assigned: PCI: 00:11.0 24 * [0xf2481000 - 0xf24811ff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f2481200 size: 22481200 align: 28 gran: 0 done
PCI: 00:01.0 allocate_resources_prefmem: base:e0000000 size:10000000 align:28 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 14 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:01.0 allocate_resources_prefmem: next_base: f0000000 size: 10000000 align: 28 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:f0000000 size:2100000 align:24 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 10 * [0xf0000000 - 0xf0ffffff] mem
Assigned: PCI: 01:00.0 18 * [0xf1000000 - 0xf1ffffff] mem
Assigned: PCI: 01:00.0 30 * [0xf2000000 - 0xf201ffff] mem
PCI: 00:01.0 allocate_resources_mem: next_base: f2020000 size: 2100000 align: 24 gran: 20 done
PCI: 00:12.0 allocate_resources_prefmem: base:ff7fffff size:0 align:20 gran:20 limit:ff7fffff
PCI: 00:12.0 allocate_resources_prefmem: next_base: ff7fffff size: 0 align: 20 gran: 20 done
PCI: 00:12.0 allocate_resources_mem: base:f2100000 size:100000 align:20 gran:20 limit:ff7fffff
Assigned: PCI: 02:0b.0 14 * [0xf2100000 - 0xf2103fff] mem
Assigned: PCI: 02:08.0 10 * [0xf2104000 - 0xf2104fff] mem
Assigned: PCI: 02:08.1 10 * [0xf2105000 - 0xf2105fff] mem
Assigned: PCI: 02:0b.0 10 * [0xf2106000 - 0xf21067ff] mem
Assigned: PCI: 02:08.2 10 * [0xf2106800 - 0xf21068ff] mem
PCI: 00:12.0 allocate_resources_mem: next_base: f2106900 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 1024 MB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f0000000 - 0x00f20fffff] size 0x02100000 gran 0x14 bus 01 mem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f0ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 01:00.0 18 <- [0x00f1000000 - 0x00f1ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 30 <- [0x00f2000000 - 0x00f201ffff] size 0x00020000 gran 0x11 romem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 00:07.0 assign_resources, bus 0 link: 0
PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 002e.1 60 <- [0x0000000378 - 0x0000000777] size 0x00000400 gran 0x0a io
PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned
PNP: 002e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.2 74 drq size: 0x0000000001 not assigned
ERROR: PNP: 002e.2 75 drq size: 0x0000000001 not assigned
PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.6 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io
PNP: 002e.6 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io
PNP: 002e.6 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PCI: 00:07.0 assign_resources, bus 0 link: 0
PCI: 00:07.1 20 <- [0x0000001080 - 0x000000108f] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:11.0 10 <- [0x00000010a0 - 0x00000010a7] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x00000010b8 - 0x00000010bb] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x00000010a8 - 0x00000010af] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x00000010bc - 0x00000010bf] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000001090 - 0x000000109f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f2481000 - 0x00f24811ff] size 0x00000200 gran 0x09 mem
PCI: 00:11.0 30 <- [0x00f2400000 - 0x00f247ffff] size 0x00080000 gran 0x13 romem
PCI: 00:12.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:12.0 24 <- [0x00ff7fffff - 0x00ff7ffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:12.0 20 <- [0x00f2100000 - 0x00f21fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:12.0 assign_resources, bus 2 link: 0
PCI: 02:08.0 10 <- [0x00f2104000 - 0x00f2104fff] size 0x00001000 gran 0x0c mem
PCI: 02:08.1 10 <- [0x00f2105000 - 0x00f2105fff] size 0x00001000 gran 0x0c mem
PCI: 02:08.2 10 <- [0x00f2106800 - 0x00f21068ff] size 0x00000100 gran 0x08 mem
PCI: 02:0b.0 10 <- [0x00f2106000 - 0x00f21067ff] size 0x00000800 gran 0x0b mem
PCI: 02:0b.0 14 <- [0x00f2100000 - 0x00f2103fff] size 0x00004000 gran 0x0e mem
PCI: 00:12.0 assign_resources, bus 2 link: 0
PCI: 00:13.0 10 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
PCI: 00:13.1 10 <- [0x00000010b0 - 0x00000010b7] size 0x00000008 gran 0x03 io
PCI: 00:14.0 10 <- [0x00f2480000 - 0x00f2480fff] size 0x00001000 gran 0x0c mem
PCI: 00:14.0 14 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:14.0 18 <- [0x00f2200000 - 0x00f22fffff] size 0x00100000 gran 0x14 mem
PCI: 00:14.0 30 <- [0x00f2300000 - 0x00f23fffff] size 0x00100000 gran 0x14 romem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 1000 size c0 align 6 gran 0 limit e3ff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base d0000000 size 22481200 align 28 gran 0 limit ff7fffff flags 40040200 index 10000100
PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
PCI_DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index b
PCI: 00:00.0
PCI: 00:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 10
PCI: 00:01.0 child on link 0 PCI: 01:00.0
PCI: 00:01.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 20 limit ff7fffff flags 60081202 index 24
PCI: 00:01.0 resource base f0000000 size 2100000 align 24 gran 20 limit ff7fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base f0000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 10
PCI: 01:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 14
PCI: 01:00.0 resource base f1000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 18
PCI: 01:00.0 resource base f2000000 size 20000 align 17 gran 17 limit ff7fffff flags 60002200 index 30
PCI: 00:07.0 child on link 0 PNP: 002e.0
PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
PNP: 002e.0
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags e0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.4
PNP: 002e.5
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.6
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PCI: 00:07.1
PCI: 00:07.1 resource base 1080 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
PCI: 00:07.2
PCI: 00:07.2 resource base 1040 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20
PCI: 00:07.3
PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
PCI: 00:11.0
PCI: 00:11.0 resource base 10a0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
PCI: 00:11.0 resource base 10b8 size 4 align 2 gran 2 limit e3ff flags 60000100 index 14
PCI: 00:11.0 resource base 10a8 size 8 align 3 gran 3 limit e3ff flags 60000100 index 18
PCI: 00:11.0 resource base 10bc size 4 align 2 gran 2 limit e3ff flags 60000100 index 1c
PCI: 00:11.0 resource base 1090 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
PCI: 00:11.0 resource base f2481000 size 200 align 9 gran 9 limit ff7fffff flags 60000200 index 24
PCI: 00:11.0 resource base f2400000 size 80000 align 19 gran 19 limit ff7fffff flags 60002200 index 30
PCI: 00:12.0 child on link 0 PCI: 02:08.0
PCI: 00:12.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
PCI: 00:12.0 resource base ff7fffff size 0 align 20 gran 20 limit ff7fffff flags 60081202 index 24
PCI: 00:12.0 resource base f2100000 size 100000 align 20 gran 20 limit ff7fffff flags 60080202 index 20
PCI: 02:08.0
PCI: 02:08.0 resource base f2104000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 02:08.1
PCI: 02:08.1 resource base f2105000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 02:08.2
PCI: 02:08.2 resource base f2106800 size 100 align 8 gran 8 limit ff7fffff flags 60000200 index 10
PCI: 02:0b.0
PCI: 02:0b.0 resource base f2106000 size 800 align 11 gran 11 limit ff7fffff flags 60000200 index 10
PCI: 02:0b.0 resource base f2100000 size 4000 align 14 gran 14 limit ff7fffff flags 60000200 index 14
PCI: 00:13.0
PCI: 00:13.0 resource base 1060 size 20 align 5 gran 5 limit e3ff flags 60000100 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 10b0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base f2480000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 00:14.0 resource base 1000 size 40 align 6 gran 6 limit e3ff flags 60000100 index 14
PCI: 00:14.0 resource base f2200000 size 100000 align 20 gran 20 limit ff7fffff flags 60000200 index 18
PCI: 00:14.0 resource base f2300000 size 100000 align 20 gran 20 limit ff7fffff flags 60002200 index 30
Done allocating resources.
POST: 0x88
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 008b
PCI: 00:01.0 cmd <- 07
PCI: 00:07.0 cmd <- 07
PCI: 00:07.1 cmd <- 01
PCI: 00:07.2 cmd <- 01
PCI: 00:07.3 cmd <- 01
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 bridge ctrl <- 0003
PCI: 00:12.0 cmd <- 06
PCI: 00:13.0 cmd <- 01
PCI: 00:13.1 cmd <- 01
PCI: 00:14.0 cmd <- 03
PCI: 01:00.0 cmd <- 03
PCI: 02:08.0 cmd <- 02
PCI: 02:08.1 cmd <- 02
PCI: 02:08.2 cmd <- 02
PCI: 02:0b.0 cmd <- 02
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
malloc Enter, size 68, free_mem_ptr 00130cd8
malloc 00130cd8
Initializing CPU #0
CPU: vendor Intel device 686
CPU: family 06, model 08, stepping 06
POST: 0x60
Enabling cache
Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB
ADDRESS_MASK_HIGH=0xf
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
POST: 0x6a
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
microcode_info: sig = 0x00000686 pf=0x00000010 rev = 0x00000000
Disabling local apic...done.
POST: 0x9b
CPU #0 initialized
PCI: 00:00.0 init
Northbridge Init
PCI: 00:07.0 init
RTC Init
PCI: 00:07.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: off
IDE: Primary IDE interface, drive 1: UDMA/33: off
IDE: Secondary IDE interface, drive 0: UDMA/33: off
IDE: Secondary IDE interface, drive 1: UDMA/33: off
PCI: 00:07.2 init
PCI: 00:11.0 init
PCI: 00:13.0 init
PCI: 00:13.1 init
PCI: 00:14.0 init
PCI: 01:00.0 init
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
CBFS: follow chain: fffc34c0 + 38 + 148d7 + align -> fffd7e00
Check fallback/payload
CBFS: follow chain: fffd7e00 + 38 + bd99 + align -> fffe3c00
Check
CBFS: follow chain: fffe3c00 + 28 + 1c076 + align -> fffffcc0
CBFS: Could not find file pci10de,02e1.rom
On card, ROM address for PCI: 01:00.0 = f2000000
PCI expansion ROM, signature 0xaa55, INIT size 0xee00, data ptr 0x00b8
PCI ROM image, vendor ID 10de, device ID 02e1,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from f2000000 to 0xc0000, 0xee00 bytes
Real mode stub @00000600: 606 bytes
Calling Option ROM...
... Option ROM returned.
PNP: 002e.0 init
PNP: 002e.1 init
PNP: 002e.2 init
PNP: 002e.3 init
PNP: 002e.5 init
PNP: 002e.6 init
Keyboard init...
No PS/2 keyboard detected.
PCI: 02:08.0 init
PCI: 02:08.1 init
PCI: 02:08.2 init
PCI: 02:0b.0 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:14.0: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:08.0: enabled 1
PCI: 02:08.1: enabled 1
PCI: 02:08.2: enabled 1
PCI: 02:0b.0: enabled 1
CPU: 00: enabled 1
POST: 0x89
Initializing CBMEM area to 0x3fff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 3fff0200...ok
High Tables Base is 3fff0000.
POST: 0x9d
Adding CBMEM entry as no. 2
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518 checksum bbdf
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x3fff0400
rom_table_end = 0x3fff0400
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x3fff0400 to 0x40000000
Adding high table area
coreboot memory table:
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-000000003ffeffff: RAM
3. 000000003fff0000-000000003fffffff: CONFIGURATION TABLES
4. 00000000ff800000-00000000ffffffff: RESERVED
Wrote coreboot table at: 3fff0400 - 3fff05ac checksum 2d4d
coreboot table: 428 bytes.
POST: 0x9e
POST: 0x9d
Multiboot Information structure has been written.
0. FREE SPACE 3fff2400 0000dc00
1. GDT 3fff0200 00000200
2. COREBOOT 3fff0400 00002000
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
CBFS: follow chain: fffc34c0 + 38 + 148d7 + align -> fffd7e00
Check fallback/payload
Got a payload
Loading segment from rom address 0xfffd7e38
data (compression=1)
malloc Enter, size 36, free_mem_ptr 00130d1c
malloc 00130d1c
New segment dstaddr 0xe7c70 memsize 0x18390 srcaddr 0xfffd7e70 filesize 0xbd61
(cleaned up) New segment addr 0xe7c70 size 0x18390 offset 0xfffd7e70 filesize 0xbd61
Loading segment from rom address 0xfffd7e54
Entry Point 0x000fc1a9
Loading Segment: addr: 0x00000000000e7c70 memsz: 0x0000000000018390 filesz: 0x000000000000bd61
lb: [0x0000000000100000, 0x0000000000134000)
Post relocation: addr: 0x00000000000e7c70 memsz: 0x0000000000018390 filesz: 0x000000000000bd61
using LZMA
[ 0x000e7c70, 00100000, 0x00100000) <- fffd7e70
dest 000e7c70, end 00100000, bouncebuffer 3ff88000
Loaded segments
Jumping to boot code at fc1a9
POST: 0xfe
entry = 0x000fc1a9
lb_start = 0x00100000
lb_size = 0x00034000
adjust = 0x3febc000
buffer = 0x3ff88000
elf_boot_notes = 0x001246fc
adjusted_boot_notes = 0x3ffe06fc
coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 starting...
DIMM 0: 50
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 20 30 40 50 60 70 80 00 b0 2a 00 a0 aa 00 00
70: 00 1f 02 38 aa aa 00 00 00 ff 10 38 10 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c fe ff 7f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
Found DIMM in slot 3
PGPOL[BPR] has been set to 0xff
RPS has been set to 0xaaaa
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
Enabling refresh (DRAMC = 0x09) for DIMM 00
Enabling refresh (DRAMC = 0x09) for DIMM 01
Enabling refresh (DRAMC = 0x09) for DIMM 02
Enabling refresh (DRAMC = 0x09) for DIMM 03
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 40 00 00
10: 08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 20 30 40 50 60 70 80 00 b0 2a 00 a0 aa 00 00
70: 00 1f 02 38 aa aa 00 00 00 ff 10 38 10 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 18 0c fe ff 7f 00 00 00
d0: 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00
Loading image.
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (212992 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
-------------- next part --------------
coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 starting...
DIMM 0: 50
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 1: 51
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 2: 52
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
DIMM 3: 53
00: 80 08 04 0c 0a 02 40 00 01 75 54 00 80 08 00 01
10: 8f 04 06 01 01 00 0e a0 60 00 00 14 0f 14 2d 20
20: 15 08 15 08 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12 b0
40: 10 00 00 00 00 00 00 00 58 34 35 33 32 43 44 36
50: 34 37 58 46 2d 41 37 35 20 20 20 32 20 00 00 00
60: 00 00 00 53 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 64 ff
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Northbridge prior to SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 20 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 02 00 ff 00 00 00 0b 03 10 11 11 11 01 33 33
60: 10 20 30 40 50 60 70 80 00 b0 ea af 0a fa 00 00
70: 20 1f 0a 78 aa aa 17 01 28 ff 50 38 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 01 03 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 7e 36 40 40 00 00
c0: 00 00 00 00 00 00 00 00 18 0c ff ff 7f 00 00 00
d0: 2c 00 ff aa 40 40 00 00 0c 00 00 00 00 00 00 00
e0: d4 b6 ff e3 91 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00
Found DIMM in slot 0
Found DIMM in slot 1
Found DIMM in slot 2
Found DIMM in slot 3
PGPOL[BPR] has been set to 0xff
RPS has been set to 0xaaaa
NBXECC[31:24] has been set to 0xff
DRAMC has been set to 0x08
RAM Enable 1: Apply NOP
RAM Enable 2: Precharge all
RAM Enable 3: CBR
RAM Enable 4: Mode register set
RAM Enable 5: Normal operation
RAM Enable 6: Enable refresh
Enabling refresh (DRAMC = 0x09) for DIMM 00
Enabling refresh (DRAMC = 0x09) for DIMM 01
Enabling refresh (DRAMC = 0x09) for DIMM 02
Enabling refresh (DRAMC = 0x09) for DIMM 03
Northbridge following SDRAM init:
PCI: 00:00.00
00: 86 80 90 71 06 00 10 22 03 00 00 06 00 20 00 00
10: 08 00 00 f4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33
60: 10 20 30 40 50 60 70 80 00 b0 2a 00 a0 aa 00 00
70: 20 1f 0a 78 aa aa 00 00 00 ff 10 38 10 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00
a0: 02 00 10 00 03 02 00 1f 01 03 00 00 00 00 00 00
b0: 80 20 00 00 30 00 00 00 00 00 7e 36 40 40 00 00
c0: 00 00 00 00 00 00 00 00 18 0c fe ff 7f 00 00 00
d0: 2c 00 ff aa 40 40 00 00 0c 00 00 00 00 00 00 00
e0: d4 b6 ff e3 91 3e 00 80 2c d3 f7 cf 9d 3e 00 00
f0: 40 01 00 00 00 f8 00 60 20 0f 00 00 00 00 00 00
Loading image.
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (212992 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
POST: 0x80
POST: 0x39
coreboot-4.0-r6247M Sun Jan 9 00:50:21 AKST 2011 booting...
POST: 0x40
clocks_per_usec: 753
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
Compare with tree...
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
Finding PCI configuration type.
PCI: Using configuration type 1
POST: 0x5f
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/7190] ops
PCI: 00:00.0 [8086/7190] enabled
PCI: 00:01.0 [8086/7191] enabled
PCI: 00:07.0 [8086/7110] bus ops
PCI: 00:07.0 [8086/7110] enabled
PCI: 00:07.1 [8086/7111] ops
PCI: 00:07.1 [8086/7111] enabled
PCI: 00:07.2 [8086/7112] ops
PCI: 00:07.2 [8086/7112] enabled
PCI: 00:07.3 [8086/7113] bus ops
pwrmgt_enable: gpo default missing in devicetree.cb!
PCI: 00:07.3 [8086/7113] enabled
malloc Enter, size 68, free_mem_ptr 00130000
malloc 00130000
PCI: 00:11.0 [1095/3512] enabled
malloc Enter, size 68, free_mem_ptr 00130044
malloc 00130044
Capability: type 0x01 @ 0x80
Capability: type 0x06 @ 0x90
Capability: type 0x03 @ 0xa0
Capability: type 0x01 @ 0x80
Capability: type 0x06 @ 0x90
Capability: type 0x03 @ 0xa0
PCI: 00:12.0 [3388/0021] enabled
malloc Enter, size 68, free_mem_ptr 00130088
malloc 00130088
PCI: 00:13.0 [1102/0002] enabled
malloc Enter, size 68, free_mem_ptr 001300cc
malloc 001300cc
PCI: 00:13.1 [1102/7002] enabled
malloc Enter, size 68, free_mem_ptr 00130110
malloc 00130110
PCI: 00:14.0 [8086/1229] enabled
POST: 0x25
do_pci_scan_bridge for PCI: 00:01.0
malloc Enter, size 24, free_mem_ptr 00130154
malloc 00130154
PCI: pci_scan_bus for bus 01
POST: 0x24
malloc Enter, size 68, free_mem_ptr 0013016c
malloc 0013016c
PCI: 01:00.0 [10de/02e1] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=001
POST: 0x55
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:07.0
malloc Enter, size 2560, free_mem_ptr 001301b0
malloc 001301b0
PNP: 002e.0 enabled
PNP: 002e.1 enabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.4 enabled
PNP: 002e.5 enabled
PNP: 002e.6 enabled
scan_static_bus for PCI: 00:07.0 done
scan_static_bus for PCI: 00:07.3
scan_static_bus for PCI: 00:07.3 done
do_pci_scan_bridge for PCI: 00:12.0
malloc Enter, size 24, free_mem_ptr 00130bb0
malloc 00130bb0
PCI: pci_scan_bus for bus 02
POST: 0x24
malloc Enter, size 68, free_mem_ptr 00130bc8
malloc 00130bc8
PCI: 02:08.0 [1033/0035] enabled
malloc Enter, size 68, free_mem_ptr 00130c0c
malloc 00130c0c
PCI: 02:08.1 [1033/0035] enabled
malloc Enter, size 68, free_mem_ptr 00130c50
malloc 00130c50
PCI: 02:08.2 [1033/00e0] enabled
malloc Enter, size 68, free_mem_ptr 00130c94
malloc 00130c94
PCI: 02:0b.0 [104c/8020] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
do_pci_scan_bridge returns max 2
PCI: pci_scan_bus returning with max=002
POST: 0x55
scan_static_bus for Root Device done
done
POST: 0x66
Setting up VGA for PCI: 01:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:07.0 read_resources bus 0 link: 0
PNP: 002e.4 missing read_resources
PCI: 00:07.0 read_resources bus 0 link: 0 done
PCI: 00:12.0 read_resources bus 2 link: 0
PCI: 00:12.0 read_resources bus 2 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 1200 index 10
PCI: 00:01.0 child on link 0 PCI: 01:00.0
PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
PCI: 01:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 14
PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 18
PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
PCI: 00:07.0 child on link 0 PNP: 002e.0
PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
PNP: 002e.0
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags c0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.4
PNP: 002e.5
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.6
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PCI: 00:07.1
PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:07.2
PCI: 00:07.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:07.3
PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 200 align 9 gran 9 limit ffffffff flags 200 index 24
PCI: 00:11.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 2200 index 30
PCI: 00:12.0 child on link 0 PCI: 02:08.0
PCI: 00:12.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:12.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:12.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:08.0
PCI: 02:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 02:08.1
PCI: 02:08.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 02:08.2
PCI: 02:08.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
PCI: 02:0b.0
PCI: 02:0b.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 10
PCI: 02:0b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:14.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 14
PCI: 00:14.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
PCI: 00:14.0 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 2200 index 30
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:12.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:12.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.0 14 * [0x0 - 0x3f] io
PCI: 00:07.2 20 * [0x40 - 0x5f] io
PCI: 00:13.0 10 * [0x60 - 0x7f] io
PCI: 00:07.1 20 * [0x80 - 0x8f] io
PCI: 00:11.0 20 * [0x90 - 0x9f] io
PCI: 00:11.0 10 * [0xa0 - 0xa7] io
PCI: 00:11.0 18 * [0xa8 - 0xaf] io
PCI: 00:13.1 10 * [0xb0 - 0xb7] io
PCI: 00:11.0 14 * [0xb8 - 0xbb] io
PCI: 00:11.0 1c * [0xbc - 0xbf] io
PCI_DOMAIN: 0000 compute_resources_io: base: c0 size: c0 align: 6 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 14 * [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 compute_resources_prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xffffff] mem
PCI: 01:00.0 18 * [0x1000000 - 0x1ffffff] mem
PCI: 01:00.0 30 * [0x2000000 - 0x201ffff] mem
PCI: 00:01.0 compute_resources_mem: base: 2020000 size: 2100000 align: 24 gran: 20 limit: ffffffff done
PCI: 00:12.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:12.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:12.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:0b.0 14 * [0x0 - 0x3fff] mem
PCI: 02:08.0 10 * [0x4000 - 0x4fff] mem
PCI: 02:08.1 10 * [0x5000 - 0x5fff] mem
PCI: 02:0b.0 10 * [0x6000 - 0x67ff] mem
PCI: 02:08.2 10 * [0x6800 - 0x68ff] mem
PCI: 00:12.0 compute_resources_mem: base: 6900 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 24 * [0x0 - 0xfffffff] prefmem
PCI: 00:00.0 10 * [0x10000000 - 0x13ffffff] prefmem
PCI: 00:01.0 20 * [0x14000000 - 0x160fffff] mem
PCI: 00:12.0 20 * [0x16100000 - 0x161fffff] mem
PCI: 00:14.0 18 * [0x16200000 - 0x162fffff] mem
PCI: 00:14.0 30 * [0x16300000 - 0x163fffff] mem
PCI: 00:11.0 30 * [0x16400000 - 0x1647ffff] mem
PCI: 00:14.0 10 * [0x16480000 - 0x16480fff] mem
PCI: 00:11.0 24 * [0x16481000 - 0x164811ff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 16481200 size: 16481200 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:07.0
constrain_resources: PNP: 002e.0
constrain_resources: PNP: 002e.1
constrain_resources: PNP: 002e.2
constrain_resources: PNP: 002e.3
constrain_resources: PNP: 002e.4
constrain_resources: PNP: 002e.5
constrain_resources: PNP: 002e.6
constrain_resources: PCI: 00:07.1
constrain_resources: PCI: 00:07.2
constrain_resources: PCI: 00:07.3
constrain_resources: PCI: 00:11.0
constrain_resources: PCI: 00:12.0
constrain_resources: PCI: 02:08.0
constrain_resources: PCI: 02:08.1
constrain_resources: PCI: 02:08.2
constrain_resources: PCI: 02:0b.0
constrain_resources: PCI: 00:13.0
constrain_resources: PCI: 00:13.1
constrain_resources: PCI: 00:14.0
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000e3ff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
lim->base 00000000 lim->limit ff7fffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:c0 align:6 gran:0 limit:e3ff
Assigned: PCI: 00:14.0 14 * [0x1000 - 0x103f] io
Assigned: PCI: 00:07.2 20 * [0x1040 - 0x105f] io
Assigned: PCI: 00:13.0 10 * [0x1060 - 0x107f] io
Assigned: PCI: 00:07.1 20 * [0x1080 - 0x108f] io
Assigned: PCI: 00:11.0 20 * [0x1090 - 0x109f] io
Assigned: PCI: 00:11.0 10 * [0x10a0 - 0x10a7] io
Assigned: PCI: 00:11.0 18 * [0x10a8 - 0x10af] io
Assigned: PCI: 00:13.1 10 * [0x10b0 - 0x10b7] io
Assigned: PCI: 00:11.0 14 * [0x10b8 - 0x10bb] io
Assigned: PCI: 00:11.0 1c * [0x10bc - 0x10bf] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 10c0 size: c0 align: 6 gran: 0 done
PCI: 00:01.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:01.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI: 00:12.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
PCI: 00:12.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:16481200 align:28 gran:0 limit:ff7fffff
Assigned: PCI: 00:01.0 24 * [0xe0000000 - 0xefffffff] prefmem
Assigned: PCI: 00:00.0 10 * [0xf0000000 - 0xf3ffffff] prefmem
Assigned: PCI: 00:01.0 20 * [0xf4000000 - 0xf60fffff] mem
Assigned: PCI: 00:12.0 20 * [0xf6100000 - 0xf61fffff] mem
Assigned: PCI: 00:14.0 18 * [0xf6200000 - 0xf62fffff] mem
Assigned: PCI: 00:14.0 30 * [0xf6300000 - 0xf63fffff] mem
Assigned: PCI: 00:11.0 30 * [0xf6400000 - 0xf647ffff] mem
Assigned: PCI: 00:14.0 10 * [0xf6480000 - 0xf6480fff] mem
Assigned: PCI: 00:11.0 24 * [0xf6481000 - 0xf64811ff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f6481200 size: 16481200 align: 28 gran: 0 done
PCI: 00:01.0 allocate_resources_prefmem: base:e0000000 size:10000000 align:28 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 14 * [0xe0000000 - 0xefffffff] prefmem
PCI: 00:01.0 allocate_resources_prefmem: next_base: f0000000 size: 10000000 align: 28 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:f4000000 size:2100000 align:24 gran:20 limit:ff7fffff
Assigned: PCI: 01:00.0 10 * [0xf4000000 - 0xf4ffffff] mem
Assigned: PCI: 01:00.0 18 * [0xf5000000 - 0xf5ffffff] mem
Assigned: PCI: 01:00.0 30 * [0xf6000000 - 0xf601ffff] mem
PCI: 00:01.0 allocate_resources_mem: next_base: f6020000 size: 2100000 align: 24 gran: 20 done
PCI: 00:12.0 allocate_resources_prefmem: base:ff7fffff size:0 align:20 gran:20 limit:ff7fffff
PCI: 00:12.0 allocate_resources_prefmem: next_base: ff7fffff size: 0 align: 20 gran: 20 done
PCI: 00:12.0 allocate_resources_mem: base:f6100000 size:100000 align:20 gran:20 limit:ff7fffff
Assigned: PCI: 02:0b.0 14 * [0xf6100000 - 0xf6103fff] mem
Assigned: PCI: 02:08.0 10 * [0xf6104000 - 0xf6104fff] mem
Assigned: PCI: 02:08.1 10 * [0xf6105000 - 0xf6105fff] mem
Assigned: PCI: 02:0b.0 10 * [0xf6106000 - 0xf61067ff] mem
Assigned: PCI: 02:08.2 10 * [0xf6106800 - 0xf61068ff] mem
PCI: 00:12.0 allocate_resources_mem: next_base: f6106900 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Setting RAM size to 1024 MB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 10 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a prefmem
PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f4000000 - 0x00f60fffff] size 0x02100000 gran 0x14 bus 01 mem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f4000000 - 0x00f4ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 14 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 01:00.0 18 <- [0x00f5000000 - 0x00f5ffffff] size 0x01000000 gran 0x18 mem
PCI: 01:00.0 30 <- [0x00f6000000 - 0x00f601ffff] size 0x00020000 gran 0x11 romem
PCI: 00:01.0 assign_resources, bus 1 link: 0
PCI: 00:07.0 assign_resources, bus 0 link: 0
PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 002e.1 60 <- [0x0000000378 - 0x0000000777] size 0x00000400 gran 0x0a io
PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.1 74 drq size: 0x0000000001 not assigned
PNP: 002e.2 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
ERROR: PNP: 002e.2 74 drq size: 0x0000000001 not assigned
ERROR: PNP: 002e.2 75 drq size: 0x0000000001 not assigned
PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PNP: 002e.6 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io
PNP: 002e.6 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io
PNP: 002e.6 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PCI: 00:07.0 assign_resources, bus 0 link: 0
PCI: 00:07.1 20 <- [0x0000001080 - 0x000000108f] size 0x00000010 gran 0x04 io
PCI: 00:07.2 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:11.0 10 <- [0x00000010a0 - 0x00000010a7] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x00000010b8 - 0x00000010bb] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x00000010a8 - 0x00000010af] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x00000010bc - 0x00000010bf] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000001090 - 0x000000109f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f6481000 - 0x00f64811ff] size 0x00000200 gran 0x09 mem
PCI: 00:11.0 30 <- [0x00f6400000 - 0x00f647ffff] size 0x00080000 gran 0x13 romem
PCI: 00:12.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:12.0 24 <- [0x00ff7fffff - 0x00ff7ffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:12.0 20 <- [0x00f6100000 - 0x00f61fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:12.0 assign_resources, bus 2 link: 0
PCI: 02:08.0 10 <- [0x00f6104000 - 0x00f6104fff] size 0x00001000 gran 0x0c mem
PCI: 02:08.1 10 <- [0x00f6105000 - 0x00f6105fff] size 0x00001000 gran 0x0c mem
PCI: 02:08.2 10 <- [0x00f6106800 - 0x00f61068ff] size 0x00000100 gran 0x08 mem
PCI: 02:0b.0 10 <- [0x00f6106000 - 0x00f61067ff] size 0x00000800 gran 0x0b mem
PCI: 02:0b.0 14 <- [0x00f6100000 - 0x00f6103fff] size 0x00004000 gran 0x0e mem
PCI: 00:12.0 assign_resources, bus 2 link: 0
PCI: 00:13.0 10 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
PCI: 00:13.1 10 <- [0x00000010b0 - 0x00000010b7] size 0x00000008 gran 0x03 io
PCI: 00:14.0 10 <- [0x00f6480000 - 0x00f6480fff] size 0x00001000 gran 0x0c mem
PCI: 00:14.0 14 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:14.0 18 <- [0x00f6200000 - 0x00f62fffff] size 0x00100000 gran 0x14 mem
PCI: 00:14.0 30 <- [0x00f6300000 - 0x00f63fffff] size 0x00100000 gran 0x14 romem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 1000 size c0 align 6 gran 0 limit e3ff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base e0000000 size 16481200 align 28 gran 0 limit ff7fffff flags 40040200 index 10000100
PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
PCI_DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index b
PCI: 00:00.0
PCI: 00:00.0 resource base f0000000 size 4000000 align 26 gran 26 limit ff7fffff flags 60001200 index 10
PCI: 00:01.0 child on link 0 PCI: 01:00.0
PCI: 00:01.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 20 limit ff7fffff flags 60081202 index 24
PCI: 00:01.0 resource base f4000000 size 2100000 align 24 gran 20 limit ff7fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base f4000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 10
PCI: 01:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 14
PCI: 01:00.0 resource base f5000000 size 1000000 align 24 gran 24 limit ff7fffff flags 60000200 index 18
PCI: 01:00.0 resource base f6000000 size 20000 align 17 gran 17 limit ff7fffff flags 60002200 index 30
PCI: 00:07.0 child on link 0 PNP: 002e.0
PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
PNP: 002e.0
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
PNP: 002e.1
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags e0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.4
PNP: 002e.5
PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.6
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PCI: 00:07.1
PCI: 00:07.1 resource base 1080 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
PCI: 00:07.2
PCI: 00:07.2 resource base 1040 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20
PCI: 00:07.3
PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
PCI: 00:11.0
PCI: 00:11.0 resource base 10a0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
PCI: 00:11.0 resource base 10b8 size 4 align 2 gran 2 limit e3ff flags 60000100 index 14
PCI: 00:11.0 resource base 10a8 size 8 align 3 gran 3 limit e3ff flags 60000100 index 18
PCI: 00:11.0 resource base 10bc size 4 align 2 gran 2 limit e3ff flags 60000100 index 1c
PCI: 00:11.0 resource base 1090 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
PCI: 00:11.0 resource base f6481000 size 200 align 9 gran 9 limit ff7fffff flags 60000200 index 24
PCI: 00:11.0 resource base f6400000 size 80000 align 19 gran 19 limit ff7fffff flags 60002200 index 30
PCI: 00:12.0 child on link 0 PCI: 02:08.0
PCI: 00:12.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
PCI: 00:12.0 resource base ff7fffff size 0 align 20 gran 20 limit ff7fffff flags 60081202 index 24
PCI: 00:12.0 resource base f6100000 size 100000 align 20 gran 20 limit ff7fffff flags 60080202 index 20
PCI: 02:08.0
PCI: 02:08.0 resource base f6104000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 02:08.1
PCI: 02:08.1 resource base f6105000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 02:08.2
PCI: 02:08.2 resource base f6106800 size 100 align 8 gran 8 limit ff7fffff flags 60000200 index 10
PCI: 02:0b.0
PCI: 02:0b.0 resource base f6106000 size 800 align 11 gran 11 limit ff7fffff flags 60000200 index 10
PCI: 02:0b.0 resource base f6100000 size 4000 align 14 gran 14 limit ff7fffff flags 60000200 index 14
PCI: 00:13.0
PCI: 00:13.0 resource base 1060 size 20 align 5 gran 5 limit e3ff flags 60000100 index 10
PCI: 00:13.1
PCI: 00:13.1 resource base 10b0 size 8 align 3 gran 3 limit e3ff flags 60000100 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base f6480000 size 1000 align 12 gran 12 limit ff7fffff flags 60000200 index 10
PCI: 00:14.0 resource base 1000 size 40 align 6 gran 6 limit e3ff flags 60000100 index 14
PCI: 00:14.0 resource base f6200000 size 100000 align 20 gran 20 limit ff7fffff flags 60000200 index 18
PCI: 00:14.0 resource base f6300000 size 100000 align 20 gran 20 limit ff7fffff flags 60002200 index 30
Done allocating resources.
POST: 0x88
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 008b
PCI: 00:01.0 cmd <- 1f
PCI: 00:07.0 cmd <- 0f
PCI: 00:07.1 cmd <- 05
PCI: 00:07.2 cmd <- 05
PCI: 00:07.3 cmd <- 01
PCI: 00:11.0 cmd <- 107
PCI: 00:12.0 bridge ctrl <- 0003
PCI: 00:12.0 cmd <- 107
PCI: 00:13.0 cmd <- 105
PCI: 00:13.1 cmd <- 105
PCI: 00:14.0 cmd <- 113
PCI: 01:00.0 cmd <- 107
PCI: 02:08.0 cmd <- 112
PCI: 02:08.1 cmd <- 112
PCI: 02:08.2 cmd <- 112
PCI: 02:0b.0 cmd <- 116
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
malloc Enter, size 68, free_mem_ptr 00130cd8
malloc 00130cd8
Initializing CPU #0
CPU: vendor Intel device 686
CPU: family 06, model 08, stepping 06
POST: 0x60
Enabling cache
Setting fixed MTRRs(0-88) Type: UC
Setting fixed MTRRs(0-16) Type: WB
Setting fixed MTRRs(24-88) Type: WB
DONE fixed MTRRs
call enable_fixed_mtrr()
Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB
ADDRESS_MASK_HIGH=0xf
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
POST: 0x6a
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
microcode_info: sig = 0x00000686 pf=0x00000010 rev = 0x00000007
Disabling local apic...done.
POST: 0x9b
CPU #0 initialized
PCI: 00:00.0 init
Northbridge Init
PCI: 00:07.0 init
RTC Init
PCI: 00:07.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: on
IDE: Primary IDE interface, drive 0: UDMA/33: off
IDE: Primary IDE interface, drive 1: UDMA/33: off
IDE: Secondary IDE interface, drive 0: UDMA/33: off
IDE: Secondary IDE interface, drive 1: UDMA/33: off
PCI: 00:07.2 init
PCI: 00:11.0 init
PCI: 00:13.0 init
PCI: 00:13.1 init
PCI: 00:14.0 init
PCI: 01:00.0 init
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
CBFS: follow chain: fffc34c0 + 38 + 148d7 + align -> fffd7e00
Check fallback/payload
CBFS: follow chain: fffd7e00 + 38 + bd99 + align -> fffe3c00
Check
CBFS: follow chain: fffe3c00 + 28 + 1c076 + align -> fffffcc0
CBFS: Could not find file pci10de,02e1.rom
On card, ROM address for PCI: 01:00.0 = f6000000
PCI expansion ROM, signature 0xaa55, INIT size 0xee00, data ptr 0x00b8
PCI ROM image, vendor ID 10de, device ID 02e1,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from f6000000 to 0xc0000, 0xee00 bytes
Real mode stub @00000600: 606 bytes
Calling Option ROM...
... Option ROM returned.
PNP: 002e.0 init
PNP: 002e.1 init
PNP: 002e.2 init
PNP: 002e.3 init
PNP: 002e.5 init
PNP: 002e.6 init
Keyboard init...
No PS/2 keyboard detected.
PCI: 02:08.0 init
PCI: 02:08.1 init
PCI: 02:08.2 init
PCI: 02:0b.0 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:07.0: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PCI: 00:07.1: enabled 1
PCI: 00:07.2: enabled 1
PCI: 00:07.3: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:14.0: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:08.0: enabled 1
PCI: 02:08.1: enabled 1
PCI: 02:08.2: enabled 1
PCI: 02:0b.0: enabled 1
CPU: 00: enabled 1
POST: 0x89
Initializing CBMEM area to 0x3fff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 3fff0200...ok
High Tables Base is 3fff0000.
POST: 0x9d
Adding CBMEM entry as no. 2
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518 checksum bbdf
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x3fff0400
rom_table_end = 0x3fff0400
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x3fff0400 to 0x40000000
Adding high table area
coreboot memory table:
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-000000003ffeffff: RAM
3. 000000003fff0000-000000003fffffff: CONFIGURATION TABLES
4. 00000000ff800000-00000000ffffffff: RESERVED
Wrote coreboot table at: 3fff0400 - 3fff05ac checksum e78e
coreboot table: 428 bytes.
POST: 0x9e
POST: 0x9d
Multiboot Information structure has been written.
0. FREE SPACE 3fff2400 0000dc00
1. GDT 3fff0200 00000200
2. COREBOOT 3fff0400 00002000
Check CBFS header at fffffc9e
magic is 4f524243
Found CBFS header at fffffc9e
Check fallback/romstage
CBFS: follow chain: fffc0000 + 38 + 345a + align -> fffc34c0
Check fallback/coreboot_ram
CBFS: follow chain: fffc34c0 + 38 + 148d7 + align -> fffd7e00
Check fallback/payload
Got a payload
Loading segment from rom address 0xfffd7e38
data (compression=1)
malloc Enter, size 36, free_mem_ptr 00130d1c
malloc 00130d1c
New segment dstaddr 0xe7c70 memsize 0x18390 srcaddr 0xfffd7e70 filesize 0xbd61
(cleaned up) New segment addr 0xe7c70 size 0x18390 offset 0xfffd7e70 filesize 0xbd61
Loading segment from rom address 0xfffd7e54
Entry Point 0x000fc1a9
Loading Segment: addr: 0x00000000000e7c70 memsz: 0x0000000000018390 filesz: 0x000000000000bd61
lb: [0x0000000000100000, 0x0000000000134000)
Post relocation: addr: 0x00000000000e7c70 memsz: 0x0000000000018390 filesz: 0x000000000000bd61
using LZMA
[ 0x000e7c70, 00100000, 0x00100000) <- fffd7e70
dest 000e7c70, end 00100000, bouncebuffer 3ff88000
Loaded segments
Jumping to boot code at fc1a9
POST: 0xfe
entry = 0x000fc1a9
lb_start = 0x00100000
lb_size = 0x00034000
adjust = 0x3febc000
buffer = 0x3ff88000
elf_boot_notes = 0x001246fc
adjusted_boot_notes = 0x3ffe06fc
$S0b#e5
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