[coreboot] [RFC] use of SMM with SSE/MMX...
Scott Duplichan
scott at notabs.org
Mon Jul 4 04:56:23 CEST 2011
Stefan Reinauer wrote:
]On 7/2/11 2:08 PM, Rudolf Marek wrote:
]> Hi,
]>
]> Yes even 486 would be good fit! (It has more closer aligns etc). As
]> Stefan mentioned, some CPU might not have SSE enabled failing to
]> execute coreboot. Maybe this is a bit broader problem.
]>
]> Thanks
]> Rudolf
]>
]Note that this problem does not happen with the reference toolchain that
]is i386-elf.
The asrock e350m1 project ends up with some mmx and xmm register usage,
at least as I build it. Some is forced in by the memory initialization
code. Examples are the asm code in function _mm_stream_si128_fs2() and
in file cache_as_ram.inc. In other cases, it appears the compiler
chooses these registers on its own. For the AMD reference code, this is
not surprising due to the use of compiler flags -march=k8-sse3 and
-mtune=k8-sse3. However, there are cases in common coreboot code where
xmm register accesses are generated, such as in coreboot_table.c.
]I agree, we should add CFLAGS to not compile coreboot or at least the
]SMM handler with MMX/SSE/... instructions.
]There is no big gain in doing so anyways.
If the smm code is stand-alone and does not call library functions, then
using separate compile flags for it should be easy.
]Stefan
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