[coreboot] SPI clock rate

Andreas Galauner andreas at galauner.de
Tue Jul 5 02:41:21 CEST 2011


On 7/5/11 2:25 AM, Peter Stuge wrote:
> Andreas Galauner wrote:
>> I had the idea of developing a small Board which contains a USB port
>> and an SPI flash.
> 
> Sure. Or just follow Tom's tip and wire a second SPI bus master
> directly onto the mainboard.
> 
Yep, I just found the pinheader. Seems to be 1.27x1.27mm.
I also created a support ticket for the pinout on Sapphire's website. It
would be nice if they give that to me, but I really doubt it.
I'll try to measure the pinout tomorrow with a multimeter.

>> I first thought about emulating the SPI flash completely by an AVR,
> 
> What do you mean by AVR? It's relevant for much of what you write.

Oh, sorry. I mean those Atmel AVR microcontrollers. I have a few of them
lying around here and wanted to give them some new lifes apart from
laying in my part box.

> SPI flash must respond with data immediately after the last address
> bit is received. It's really inconvenient to emulate this.
> 
> 
>> new approach is a SPI flash which resides on the AVR board
> 
> Sure. But simpler to just connect directly to the SPI on the
> mainboard.
> 
> 
>> If I want to test a new BIOS, the AVR puts the motherboard into reset,
>> detaches the flash chip with a multiplexer from the motherboard,
>> programs it, switches it back to the motherboard and let off the reset.
> 
> Make that:
> 
> Hold reset
> Program flash chip on mainboard
> Release reset
> 

I'll try to figure out the pinout tomorow. And try to read the flash
with flashrom and a bus pirate

> 
>> As an added bonus, I'm thinking about using a USB 2.0 port of an
>> USB-capable AVR as a USB debug interface
> 
> Note that the Debug Class Device must be able to handle high speed
> communication ("USB 2.0" is orthogonal to "high speed") and it must
> be able to handle some out-of-spec transfers. It's not at all certain
> that your controller does this.
> 

Yes, I know.
And I just saw that my microcontrollers only do full speed and the
specification requires high speed. So, this isn't possible.

> 
>> As I am currently looking for suitable parts, I need to know some
>> basic parameters of the SPI communication.
>> Does anybody of you know what the typical clock rates between the
>> chipset and the flash are?
> 
> Any SPI bus master works, the SPI flashes are generally modern enough
> to not have a problem with very slow clocks.
> 
> Since you seem interested in doing development for SPI flashing over
> USB, you may want to look at the preliminary USB protocol document
> that me and Stefan Tauner have been working on. Unfortunately it's
> been idle for a while, but it's nearly complete. The missing parts
> are the things that can vary between flash chips; erase command
> sequence and write command sequence. They need to be expressed in
> some nice way in the protocol. The intended development hardware is
> the Olimex LPC-P1343 board with an NXP LPC1343 Cortex-M3. Once
> software works, and once they become available, I want to put a
> LPC11U00 on a flexpcb cheap enough to be soldered permanently onto
> mainboards. (NXP promise <$1 for "quantity", probably 1k.)

I haven't done very much with SPI flashes until now. I know how the
physical protocol works and used it a few times in some smaller
microcontroller projects, but I definetely would want to take a look at it.

And the development board is easily available and cheap in Germany. Cool.


Andreas




More information about the coreboot mailing list