[coreboot] Questions about the resource allocator of PCI

[Hamo]

Hi lists,
I have moved forward to the PCI part. Now coreboot can enumerate the
PCI devices but got some problems about allocating resources to the
PCI devices.
As I know, on X86, the IO address space is below 0xffff [1] and the
memory address is from the top of address space (say, 0xffffffff)
down. Those resources for every PCI devices will be allocated by the
dev_configure function automatically.
But this is different on ARM. Every PCI device's memory address space
should be in a certain address space provided by CPU and IO address
space should be in another, like MMIO on X86. For my versatile PB
board, the address space is at here.[2]
I tried some ways and talked with my mentor about it, but we didn't
find a way to tell dev_configure to allocate device's mem and IO
address in the certain address space.
Can you help me on this? I have searched the mailing lists and found
some information about the MMIO PCI I/O address space, but all of them
don't make a conclusion.

[1]http://www.coreboot.org/pipermail/coreboot/2010-May/058384.html
[2]http://infocenter.arm.com/help/topic/com.arm.doc.dui0224i/Bbajjbce.html#Chdghfaa
  (Table 4.49)


Thanks,
Hamo