[coreboot] build failure: cannot move location counter backwards
Darren Hart
dvhart at linux.intel.com
Tue Jun 21 00:19:24 CEST 2011
I'm new to coreboot and just trying to get it to boot into qemu. I've
tried using SeaBios as well as just copying "yes" to payload.elf. I
updated the Makefile to use gcc 4.5 instead of the 4.4 that ships with
my distribution (Ubuntu 10.10):
dvhart at doubt:~/source/coreboot.svn
$ gcc --version
gcc (Ubuntu/Linaro 4.4.4-14ubuntu5) 4.4.5
Copyright (C) 2010 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
dvhart at doubt:~/source/coreboot.svn
$ gcc-4.5 --version
gcc-4.5 (Ubuntu/Linaro 4.5.1-7ubuntu2) 4.5.1
Copyright (C) 2010 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Index: Makefile
===================================================================
--- Makefile (revision 6637)
+++ Makefile (working copy)
@@ -64,7 +64,7 @@
endif
endif
-HOSTCC = gcc
+HOSTCC = gcc-4.5
HOSTCXX = g++
HOSTCFLAGS := -I$(srck) -I$(objk) -g
HOSTCXXFLAGS := -I$(srck) -I$(objk)
I followed the instructions here:
http://www.coreboot.org/Build_HOWTO
to configure for qemux86 with a 256K ROM.
The build output and resulting failure follow. Am I doing something dumb
or have I hit a legitimate bug?
$ make
GEN bootblock/ldscript.ld
LINK bootblock.elf
OBJCOPY coreboot.bootblock
CC lib/memset.romstage.o
CC lib/memcpy.romstage.o
CC lib/memcmp.romstage.o
CC lib/cbfs.romstage.o
CC lib/lzma.romstage.o
CC lib/uart8250.romstage.o
CC console/vtxprintf.romstage.o
CC console/post.romstage.o
CC console/die.romstage.o
GEN build.h
ROMCC romstage.inc
GEN romstage/crt0.S
CC mainboard/emulation/qemu-x86/crt0.s
CC mainboard/emulation/qemu-x86/crt0.romstage.o
CC arch/x86/lib/romstage_console.romstage.o
CC arch/x86/lib/cbfs_and_run.romstage.o
CC southbridge/intel/i82371eb/early_pm.romstage.o
CC southbridge/intel/i82371eb/early_smbus.romstage.o
GEN romstage/ldscript.ld
LINK coreboot.romstage
CBFS coreboot.pre
CC arch/x86/lib/c_start.ramstage.o
CC console/uart8250_console.driver.o
CC southbridge/intel/i82371eb/i82371eb.driver.o
CC southbridge/intel/i82371eb/isa.driver.o
CC southbridge/intel/i82371eb/ide.driver.o
CC southbridge/intel/i82371eb/usb.driver.o
CC southbridge/intel/i82371eb/smbus.driver.o
CC southbridge/intel/i82371eb/reset.driver.o
CC mainboard/emulation/qemu-x86/static.ramstage.o
CC lib/memset.ramstage.o
CC lib/memcpy.ramstage.o
CC lib/memcmp.ramstage.o
CC lib/memmove.ramstage.o
CC lib/malloc.ramstage.o
CC lib/delay.ramstage.o
CC lib/fallback_boot.ramstage.o
CC lib/compute_ip_checksum.ramstage.o
CC lib/version.ramstage.o
CC lib/cbfs.ramstage.o
CC lib/lzma.ramstage.o
CC lib/gcc.ramstage.o
CC lib/clog2.ramstage.o
CC lib/cbmem.ramstage.o
CC lib/uart8250.ramstage.o
CC boot/hardwaremain.ramstage.o
CC boot/selfboot.ramstage.o
CC console/printk.ramstage.o
CC console/console.ramstage.o
CC console/vtxprintf.ramstage.o
CC console/vsprintf.ramstage.o
CC console/post.ramstage.o
CC console/die.ramstage.o
CC devices/device.ramstage.o
CC devices/root_device.ramstage.o
CC devices/device_util.ramstage.o
CC devices/pci_device.ramstage.o
CC devices/pcix_device.ramstage.o
CC devices/pciexp_device.ramstage.o
CC devices/agp_device.ramstage.o
CC devices/cardbus_device.ramstage.o
CC devices/pnp_device.ramstage.o
CC devices/pci_ops.ramstage.o
CC devices/smbus_ops.ramstage.o
CC devices/pci_rom.ramstage.o
CC mainboard/emulation/qemu-x86/mainboard.ramstage.o
CC mainboard/emulation/qemu-x86/irq_tables.ramstage.o
CC mainboard/emulation/qemu-x86/northbridge.ramstage.o
CC pc80/mc146818rtc.ramstage.o
CC pc80/isa-dma.ramstage.o
CC pc80/i8259.ramstage.o
CC pc80/udelay_io.ramstage.o
CC pc80/keyboard.ramstage.o
CC devices/oprom/x86.ramstage.o
CC devices/oprom/x86_asm.ramstage.o
CC devices/oprom/x86_interrupts.ramstage.o
CC arch/x86/boot/boot.ramstage.o
CC arch/x86/boot/coreboot_table.ramstage.o
CC arch/x86/boot/multiboot.ramstage.o
CC arch/x86/boot/gdt.ramstage.o
CC arch/x86/boot/tables.ramstage.o
CC arch/x86/boot/pirq_routing.ramstage.o
CC arch/x86/lib/cpu.ramstage.o
CC arch/x86/lib/pci_ops_conf1.ramstage.o
CC arch/x86/lib/pci_ops_conf2.ramstage.o
CC arch/x86/lib/pci_ops_mmconf.ramstage.o
CC arch/x86/lib/pci_ops_auto.ramstage.o
CC arch/x86/lib/exception.ramstage.o
CC pc80/vga/vga_io.ramstage.o
AR coreboot.a
CC coreboot_ram.o
CC coreboot_ram
src/arch/x86/coreboot_ram.ld:129 cannot move location counter backwards
(from 0000000000118000 to 0000000000004000)
collect2: ld returned 1 exit status
make: *** [build/coreboot_ram] Error 1
Thanks,
--
Darren Hart
Intel Open Source Technology Center
Yocto Project - Linux Kernel
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