[coreboot] [commit] r6431 - trunk/src/mainboard/amd/bimini_fam10

[repository service]

Author: oxygene
Date: Fri Mar  4 18:09:21 2011
New Revision: 6431
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6431

Log:
Redo r6099 after copy&pasted code reintroduced DIMMx #defines

Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
Acked-by: Patrick Georgi <patrick at georgi-clan.de>

Modified:
   trunk/src/mainboard/amd/bimini_fam10/romstage.c

Modified: trunk/src/mainboard/amd/bimini_fam10/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/bimini_fam10/romstage.c	Fri Mar  4 00:09:43 2011	(r6430)
+++ trunk/src/mainboard/amd/bimini_fam10/romstage.c	Fri Mar  4 18:09:21 2011	(r6431)
@@ -49,6 +49,7 @@
 #include "southbridge/amd/rs780/early_setup.c"
 #include "southbridge/amd/sb800/early_setup.c"
 #include "northbridge/amd/amdfam10/debug.c"
+#include <spd.h>
 
 static void activate_spd_rom(const struct mem_controller *ctrl)
 {
@@ -77,11 +78,6 @@
 #define RC00  0
 #define RC01  1
 
-#define DIMM0 0x50
-#define DIMM1 0x51
-#define DIMM2 0x52
-#define DIMM3 0x53
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);