[coreboot] VGA issues on ASUS M4A785T-M

Denis 'GNUtoo' Carikli GNUtoo at no-log.org
Fri Nov 11 19:53:43 CET 2011


hi,
I'm "porting" coreboot to the Asus M4A785T-M ( 
http://www.coreboot.org/ASUS_M4A785T-M )

This board is very similar t othe M4A785-M (without the T).

The details on the changes I did are on that page and can be summed up to 
that:
-       select DIMM_DDR2
+       select DIMM_DDR3
+       select DIMM_REGISTERED
In the Kconfig of the M4A785-M mainboard.
I also had to remove the microcode loading to make it pass the CPU init.

The basics seem to work but I've some issues at the start of Xorg,
So I investigated a bit and the display freezes when the radeon linux kernel 
driver is loaded(before that the display worked fine in VGA Mode, that is to 
say VGA is initialized etc... I can see grub2 and the "press F12" of SeaBios).

I've investigated a bit and here are some kernel messages with the BIOS:
[drm] fb mappable at 0xD0040000
[drm] vram apper at 0xD0000000

With Coreboot:
[drm] fb mappable at 0xC0040000
[drm] vram apper at 0xC0000000

lspci with BIOS:
# lspci -s 01:05.0 -vvv
01:05.0 VGA compatible controller: ATI Technologies Inc RS880 [Radeon HD 4200] 
(prog-if 00 [VGA controller])
	Subsystem: ASUSTeK Computer Inc. M4A785TD Motherboard
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- >SERR+ <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 18
	Region 0: Memory at d0000000 (32-bit, prefetchable) [size=256M]
	Region 1: I/O ports at d000 [size=256]
	Region 2: Memory at fe9f0000 (32-bit, non-prefetchable) [size=64K]
	Region 5: Memory at fe800000 (32-bit, non-prefetchable) [size=1M]
	Expansion ROM at <unassigned> [disabled]
	Capabilities: [50] Power Management version 3
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA 
PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
		Address: 0000000000000000  Data: 0000
	Kernel driver in use: radeon
	Kernel modules: radeon

And lspci With the coreboot:

#  lspci -s 01:05.0 -vvv
01:05.0 VGA compatible controller: ATI Technologies Inc RS880 [Radeon HD 4200] 
(prog-if 00 [VGA controller])
	Subsystem: ATI Technologies Inc Device 0000
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 18
	Region 0: Memory at c0000000 (32-bit, prefetchable) [size=256M]
	Region 1: I/O ports at 1000 [size=256]
	Region 2: Memory at d8100000 (32-bit, non-prefetchable) [size=64K]
	Region 5: Memory at d8000000 (32-bit, non-prefetchable) [size=1M]
	Expansion ROM at <unassigned> [disabled]
	Capabilities: [50] Power Management version 3
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA 
PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
		Address: 0000000000000000  Data: 0000
	Kernel driver in use: radeon
	Kernel modules: radeon

I've already tried to change some values in coreboot without success(sorry for 
the mangling of the code but I tought sending a patch for that was a bit 
overkill):

in src/southbridge/amd/rs780/gfx.c (change 0xC0000000 in 0xD0000000) :
-nbmc_write_index(nb_dev, 0x10, ((uma_memory_size - 1 + 0xC0000000) & 
(~0xffff)) | 0xc000);
+nbmc_write_index(nb_dev, 0x10, ((uma_memory_size - 1 + 0xD0000000) & 
(~0xffff)) | 0xc000);
in src/southbridge/amd/rs780/rs780.h( change 0xC0000000 in 0xD0000000 ):
-#define        TEMP_MMIO_BASE_ADDRESS  0xC0000000
+#define        TEMP_MMIO_BASE_ADDRESS  0xD0000000
 
What should I do to change theses PCI address?
And is it the cause of my problems?

Denis.




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