[coreboot] Patch merged into coreboot/master: d7bcac8 k8 raminit: fix bug, improve clock selection, add clock limit for sock754
gerrit at coreboot.org
gerrit at coreboot.org
Wed Nov 23 01:05:41 CET 2011
the following patch was just integrated into master:
commit d7bcac8e6f4f20d8504563317a9e23013cac16c4
Author: Florian Zumbiehl <florz at florz.de>
Date: Tue Nov 1 20:18:29 2011 +0100
k8 raminit: fix bug, improve clock selection, add clock limit for sock754
in amdk8 raminit:
- fix DDR SPD offset for (CLX - 1) (25 instead of 26)
- improve clock/CL selection algorithm
- implement load-dependent clock limiting for socket 754
Change-Id: I5eb8a3e02eaca18f3bef9a98de22f23b23650762
Signed-off-by: Florian Zumbiehl <florz at florz.de>
Build-Tested: build bot (Jenkins) at Mon Nov 21 04:49:37 2011, giving +1
Reviewed-By: Rudolf Marek <r.marek at assembler.cz> at Wed Nov 23 01:05:39 2011, giving +2
See http://review.coreboot.org/377 for details.
-gerrit
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