[coreboot] Patch set updated for coreboot: eb837a7 sb800: Add sata ahci/raid mode kconfig option

[Kerry Sheh (shekairui@gmail.com)]

Kerry Sheh (shekairui at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/225

-gerrit

commit eb837a74ad78ed6d98ba0799f7ed2ed8475b1fd5
Author: Kerry Sheh <shekairui at gmail.com>
Date:   Mon Oct 10 17:17:39 2011 +0800

    sb800: Add sata ahci/raid mode kconfig option
    
    If sb800 sata was configured as ahci or raid mode,
    give the option to add ROM files.
    
    Change-Id: I87a7814930ce3a7c38cde1e235d151223eea2107
    Signed-off-by: Kerry Sheh <kerry.she at amd.com>
    Signed-off-by: Kerry Sheh <shekairui at gmail.com>
---
 src/southbridge/amd/cimx/sb800/Kconfig      |   66 +++++++++++++++++++++++++++
 src/southbridge/amd/cimx/sb800/Makefile.inc |   18 +++++++
 2 files changed, 84 insertions(+), 0 deletions(-)

diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 681c881..b7ac0db 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -28,8 +28,74 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT
         string
         default "southbridge/amd/cimx/sb800/bootblock.c"
 
+choice
+	prompt "SATA Mode"
+	default SB800_SATA_IDE
+	help
+	  Select the mode in which SATA should be driven. NATIVE AHCI, or RAID.
+	  The default is NATIVE.
+
+config SB800_SATA_IDE
+	bool "NATIVE"
+	help
+	  NATIVE is the default mode and does not require a ROM.
+
+config SB800_SATA_AHCI
+	bool "AHCI"
+	help
+	  AHCI may work with or without AHCI ROM. It depends on the payload support.
+	  For example, seabios does not require the AHCI ROM.
+
+config SB800_SATA_RAID
+	bool "RAID"
+	help
+	  sb800 RAID mode must have the two required ROM files.
+
+endchoice
+
+config SB800_SATA_MODE
+        hex
+	depends on (SB800_SATA_IDE || SB800_SATA_RAID || SB800_SATA_AHCI)
+	default "0x0" if SB800_SATA_IDE
+	default "0x1" if SB800_SATA_RAID
+	default "0x2" if SB800_SATA_AHCI
+
 config SB_SUPERIO_HWM
         bool
         default n
+
+if SB800_SATA_AHCI
+config AHCI_ROM_ID
+	string "AHCI device PCI IDs"
+	default "1002,4391"
+
+config SB800_AHCI_ROM
+	bool "Add a AHCI ROM"
+
+config AHCI_ROM_FILE
+	string "AHCI ROM path and filename"
+	depends on SB800_AHCI_ROM
+	default "site-local/sb800/ahci.bin"
+endif
+
+if SB800_SATA_RAID
+config RAID_ROM_ID
+	string "RAID device PCI IDs"
+	default "1002,4393"
+        help
+          1002,4392 for SATA NON-RAID5 module, 1002,4393 for SATA RAID5 mode
+
+config RAID_ROM_FILE
+	string "RAID ROM path and filename"
+	depends on SB800_SATA_RAID
+	default "site-local/sb800/raid.bin"
+
+config RAID_MISC_ROM_FILE
+        string "RAID Misc ROM path and filename"
+        default "site-local/sb800/misc.bin"
+	depends on SB800_SATA_RAID
+
+endif
+
 endif #SOUTHBRIDGE_AMD_CIMX_SB800
 
diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc
index acc5fdf..30c0d39 100644
--- a/src/southbridge/amd/cimx/sb800/Makefile.inc
+++ b/src/southbridge/amd/cimx/sb800/Makefile.inc
@@ -31,4 +31,22 @@ ramstage-y += late.c
 driver-y   += smbus.c
 driver-y   += lpc.c
 
+ifeq ($(CONFIG_SB800_SATA_AHCI), y)
+ifdef CONFIG_SB800_AHCI_ROM
+	stripped_ahci_rom_id = $(call strip_quotes,$(CONFIG_AHCI_ROM_ID))
+	cbfs-files-y += pci$(stripped_ahci_rom_id).rom
+	pci$(stripped_ahci_rom_id).rom-file := $(call strip_quotes,$(CONFIG_AHCI_ROM_FILE))
+	pci$(stripped_ahci_rom_id).rom-type := optionrom
+endif
+endif
 
+ifeq ($(CONFIG_SB800_SATA_RAID), y)
+	stripped_raid_rom_id = $(call strip_quotes,$(CONFIG_RAID_ROM_ID))
+	cbfs-files-y += pci$(stripped_raid_rom_id).rom
+	pci$(stripped_raid_rom_id).rom-file := $(call strip_quotes,$(CONFIG_RAID_ROM_FILE))
+	pci$(stripped_raid_rom_id).rom-type := optionrom
+
+	cbfs-files-y += raid/misc.bin
+	raid/misc.bin-file := $(call strip_quotes,$(CONFIG_RAID_MISC_ROM_FILE))
+	raid/misc.bin-type := raw
+endif