[coreboot] Issues with Supermicro H8SCM

She, Kerry Kerry.She at amd.com
Wed Oct 12 11:21:01 CEST 2011



> -----Original Message-----
> From: Thomas Gstädtner [mailto:thomas at gstaedtner.net]
> Sent: Wednesday, October 12, 2011 4:10 PM
> To: Marc Jones
> Cc: She, Kerry; coreboot
> Subject: Re: [coreboot] Issues with Supermicro H8SCM
> 
> On Wed, Oct 12, 2011 at 02:46, Marc Jones <marcj303 at gmail.com> wrote:
> > On Tue, Oct 11, 2011 at 6:17 AM, Thomas Gstädtner
> <thomas at gstaedtner.net> wrote:
> >> On Tue, Oct 11, 2011 at 12:41, She, Kerry <Kerry.She at amd.com> wrote:
> >>> Hello, Thomas
> >>>
> >>>> -----Original Message-----
> >>>> From: Thomas Gstädtner [mailto:thomas at gstaedtner.net]
> >>>> Sent: Sunday, October 09, 2011 11:53 PM
> >>>> To: She, Kerry
> >>>> Cc: Marc Jones; coreboot
> >>>> Subject: Re: [coreboot] Issues with Supermicro H8SCM
> >>>>
> >>>> On Sun, Oct 9, 2011 at 07:17, She, Kerry <Kerry.She at amd.com> wrote:
> >>>> > Hello, Thomas
> >>>> >
> >>>> >> -----Original Message-----
> >>>> >> From: coreboot-bounces+kerry.she=amd.com at coreboot.org
> >>>> >> [mailto:coreboot-
> >>>> >> bounces+kerry.she=amd.com at coreboot.org] On Behalf Of Marc Jones
> >>>> >> Sent: Saturday, October 08, 2011 3:45 AM
> >>>> >> To: Thomas Gstädtner
> >>>> >> Cc: coreboot
> >>>> >> Subject: Re: [coreboot] Issues with Supermicro H8SCM
> >>>> >>
> >>>> >> On Fri, Oct 7, 2011 at 1:10 PM, Thomas Gstädtner
> >>>> >> <thomas at gstaedtner.net>
> >>>> >> wrote:
> >>>> >> >
> >>>> >> > Thanks for the advice Marc,
> >>>> >> >
> >>>> >> > I already had the loglevel set to spew (8). I additionally
> tried
> >>>> >> > the other "Verbose output" debugging options, unfortunately I
> don't
> >>>> >> > get any output at all when they are built in.
> >>>> >> > Also, while it is hard to find and AMD doesn't have any
> official
> >>>> >> > document confirming this, according to some google hits the
> >>>> >> > processor should be revision D1 not rev E (AMD model number:
> >>>> OS4170OFU6DGOWOF ).
> >>>> >
> >>>> > I also found the latest code not boot on my H8SCM-F mainboard with
> Rev
> >>>> D1 processor.
> >>>> > So I have made some update to using the AGESA wrapper framework,
> the
> >>>> > attachment is some of my update, with this series of patches
> applied,
> >>>> > we can boot to Debian Linux Destop or Windows Server 2008 R2
> standard
> >>>> > edition.
> >>>> > Thanks
> >>>> >
> >>>>
> >>>> Hi Kerry,
> >>>>
> >>>> first of all: thanks for your effort!
> >>>> While I had no success at first, I now can get to the boot prompt
> >>>> (haven't tried any further yet).
> >>>>
> >>>> Anyway, I currently have 2 DIMMs, each 4 GiB.
> >>>> A dual-channel configuration does not seem to work, the DIMMs are
> >>>> detected, but coreboot throws an "ASSERTION FAILED" error (see
> attached
> >>>> log cb_h8scm_01.log).
> >>>> It seems to fail because it somehow seems to think no DIMM is found
> >>>> (despite both DIMMs being detected). I tried disabling this check,
> but
> >>>> this only leads to a reset.
> >>>> The same problem exists with a single-DIMM configuration.
> >>>>
> >>>> However, when I switch to a dual-DIMM, single-channel config, it at
> first
> >>>> does not start at all (i.e. no output on serial and no heartbeat
> from the
> >>>> BMC) - but when I trigger a manual reset it immediately starts up
> (see
> >>>> attached log cb_h8scm_dimma1a2_success.log).
> >>>>
> >>>> I'll report back when I find out more.
> >>>
> >>>
> >>> I have only test with 4 Registered ECC DIMMs, so I can confirm dual
> DIMMs in one channel should works,
> >>> It seems that the DRAM training has some problem for single DIMM on
> one channel situation.
> >>> Thanks
> >>> Kerry
> >>>
> >>
> >> I unfortunately only have 2 registered DIMMs, so I can't test a dual
> >> channel configuration, but yes, seems 1 DIMM per Channel does not work
> >> at all.
> >>
> >> Anyway, I built a rom with vga bios included and can boot to FILO
> >> prompt or SeaBIOS. So far USB is not working, neither the attached USB
> >> keybord, nor the USB flashdrive I wanted to boot from.
> >> A related warning seems to be: "WARNING - Timeout at
> >> ehci_wait_qh:319!", might try to disable ehci to see if ohci works.
> >>
> >> Also, it seems it now starts up most of the time immediately,
> >> approximately 1 out of 5 times it needs a manual reset after powering
> >> up.
> >> Time from power-on to FILO prompt is about 2 seconds with loglevel 3
> >> (over serial, via VGA I can't tell, it's ready long before the display
> >> makes it from wake-up to active).
> >>
> >> So in short,
> >> What Works: All 6 CPU cores are detected, clock is correct, VGA,
> >> Serial, SeaBIOS and FILO
> >> What Doesn't: USB/EHCI, Single-DIMM per Channel, reliable bootup
> >>
> >> --
> >> coreboot mailing list: coreboot at coreboot.org
> >> http://www.coreboot.org/mailman/listinfo/coreboot
> >
> > Hi Tomas
> >
> > This is great feedback. Maybe you can narrow down the boot failure. Is
> > it in coreboot, payload, or Linux when it fails?
> >
> >
> >
> > Kerry,
> >
> > Please add this info to the wiki for this board.
> >
> > Thanks,
> > Marc
> >
> > --
> > http://se-eng.com
> >
> 
> This is really hard to figure out so far, because I can get zero
> output that would help me debug this problem.
> I don't know how the hardware works exactly, but the board has a neat
> watchdog in the BMC that seems to give a hint.
> There's a heartbeat-LED that flashes when coreboot seems to run (when
> it flashes I usually get output on serial and VGA), and when it
> doesn't come up, the heartbeat-LED is off. So I _assume_ it is failing
> early on, no clue how the BMC is powered on or what it looks for.
The H8SCM Serial port connection is dependent on the BMC,
Some older BMC implementation require the system BIOS to waiting for the BMC initialization,
The serial console log printed by coreboot was dropped away during BMC initialize stage.

The mainbaord manual says after the BMC init was finished, the LED will blanking.
So you can power on the board after the BMC LED is blanking.  
Otherwise you need the BMC datasheet to figure out a solution to waiting for the BMC initialization.

> I'm pretty sure the payload is not the problem and as I have not tried
> to load linux yet we can rule that out :)
The EHCI ports works well under Linux/windows OS, 
But I get some problem with seabios payload to using the EHCI CDROM and FlashDrive.
EHCI cdrom boot sometimes, fail to boot some other time, it's quite not stable.
Thanks

> I'm happy to help with the wiki btw.



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