[coreboot] New patch to review for coreboot: 6cf3c92 T60: Add support for Ultrabay Legacy I/O devices (40Y8122)

Sven Schnelle (svens@stackframe.org) gerrit at coreboot.org
Sat Oct 15 17:37:49 CEST 2011


Sven Schnelle (svens at stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/282

-gerrit

commit 6cf3c92e3b8d09814af569a4f1a5d64e3c572241
Author: Sven Schnelle <svens at stackframe.org>
Date:   Sat Oct 15 17:31:01 2011 +0200

    T60: Add support for Ultrabay Legacy I/O devices (40Y8122)
    
    Those modules have basically the same Super I/O capabilities as
    the Docking station. Unfortunately, the Super I/O in the module
    shares the same I/O address as the Docking station, so we're not
    allowed to connect the LPC Docking Bus if such a module is present.
    
    To be able to detect this device and use it as early console for
    coreboot, we have to initialize the GPIO Controller before, as
    this device is detected via GPIO06.
    
    Change-Id: If7c38bb6797f76cf28f09f3614ab9a33878571fb
    Signed-off-by: Sven Schnelle <svens at stackframe.org>
---
 src/mainboard/lenovo/t60/dock.c          |   30 +++++++++++++++++++++++++++++-
 src/mainboard/lenovo/t60/dock.h          |    3 +++
 src/mainboard/lenovo/t60/mainboard.c     |    7 ++++++-
 src/mainboard/lenovo/t60/mainboard_smi.c |    7 ++++++-
 src/mainboard/lenovo/t60/romstage.c      |   20 +++++++++++++-------
 5 files changed, 57 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/lenovo/t60/dock.c b/src/mainboard/lenovo/t60/dock.c
index 6642bb3..f0b5a3d 100644
--- a/src/mainboard/lenovo/t60/dock.c
+++ b/src/mainboard/lenovo/t60/dock.c
@@ -28,6 +28,7 @@
 #include "dock.h"
 #include "superio/nsc/pc87384/pc87384.h"
 #include "ec/acpi/ec.h"
+#include "ec/lenovo/pmh7/pmh7.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
 
 static void dlpc_write_register(int reg, int value)
@@ -108,6 +109,9 @@ int dlpc_init(void)
 	/* Activate DLPC */
 	dlpc_write_register(0x30, 0x01);
 
+	/* Reset docking state */
+	outb(0x00, 0x164c);
+
 	dlpc_gpio_init();
 	return 0;
 }
@@ -127,7 +131,7 @@ static int dock_superio_init(void)
 	/* set GPIO pins to Serial/Parallel Port
 	 * functions
 	 */
-	dock_write_register(0x22, 0xeb);
+	dock_write_register(0x22, 0xa9);
 
 	dock_write_register(0x07, PC87384_GPIO);
 	dock_write_register(0x60, 0x16);
@@ -217,3 +221,27 @@ int dock_present(void)
 	return inb(0x15ee) & 1;
 }
 
+static void pmh7_write(int reg, u8 val)
+{
+	outb(reg, EC_LENOVO_PMH7_ADDR);
+	outb(val, EC_LENOVO_PMH7_DATA);
+}
+
+static u8 pmh7_read(int reg)
+{
+	outb(reg, EC_LENOVO_PMH7_ADDR);
+	return inb(EC_LENOVO_PMH7_DATA);
+}
+
+int legacy_io_present(void)
+{
+	return !(inb(DEFAULT_GPIOBASE + 0x0c) & 0x40);
+}
+
+void legacy_io_init(void)
+{
+	/* Enable Power for Ultrabay slot */
+	pmh7_write(0x62, pmh7_read(0x62) & ~0x01);
+	udelay(100000);
+	dock_superio_init();
+}
diff --git a/src/mainboard/lenovo/t60/dock.h b/src/mainboard/lenovo/t60/dock.h
index 9d35d9f..631f007 100644
--- a/src/mainboard/lenovo/t60/dock.h
+++ b/src/mainboard/lenovo/t60/dock.h
@@ -24,4 +24,7 @@ extern int dock_connect(void);
 extern void dock_disconnect(void);
 extern int dock_present(void);
 extern int dlpc_init(void);
+
+extern int legacy_io_present(void);
+extern void legacy_io_init(void);
 #endif
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c
index 2b8c5fe..5da6318 100644
--- a/src/mainboard/lenovo/t60/mainboard.c
+++ b/src/mainboard/lenovo/t60/mainboard.c
@@ -50,7 +50,12 @@ static void mainboard_enable(device_t dev)
 		ec_write(0x0c, 0xc7);
 
 	idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
-	if (idedev && idedev->chip_info && h8_ultrabay_device_present()) {
+
+	if (!(inb(DEFAULT_GPIOBASE + 0x0c) & 0x40)) {
+		/* legacy I/O connected */
+		pmh7_ultrabay_power_enable(1);
+		ec_write(0x0c, 0x84);
+	} else if (idedev && idedev->chip_info && h8_ultrabay_device_present()) {
 		struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
 		config->ide_enable_primary = 1;
 		pmh7_ultrabay_power_enable(1);
diff --git a/src/mainboard/lenovo/t60/mainboard_smi.c b/src/mainboard/lenovo/t60/mainboard_smi.c
index 4a0b506..2ab1d4d 100644
--- a/src/mainboard/lenovo/t60/mainboard_smi.c
+++ b/src/mainboard/lenovo/t60/mainboard_smi.c
@@ -75,7 +75,12 @@ int mainboard_io_trap_handler(int smif)
 
 	switch (smif) {
 	case SMI_DOCK_CONNECT:
-		dlpc_init();
+		/* If there's an legacy I/O module present, we're not
+		   allowed to connect the Docking LPC Bus, as both Super I/O
+		   chips are using 0x2e as base address. */
+		if (legacy_io_present())
+			break;
+
 		if (!dock_connect()) {
 			/* set dock LED to indicate status */
 			ec_write(0x0c, 0x08);
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index 252ae40..45e5710 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -210,7 +210,7 @@ static void early_ich7_init(void)
 void main(unsigned long bist)
 {
 	u32 reg32;
-	int boot_mode = 0;
+	int boot_mode = 0, dock_err;
 	const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 };
 
 	if (bist == 0)
@@ -223,15 +223,20 @@ void main(unsigned long bist)
 
 	ich7_enable_lpc();
 
+	/* We want early GPIO setup, to be able to detect legacy I/O module */
+	pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIOBASE, DEFAULT_GPIOBASE | 1);
+	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c /* GC */ , 0x10);	/* Enable GPIOs */
+	setup_ich7_gpios();
 
-	/* dock_init initializes the DLPC switch on
-	 *  thinpad side, so this is required even
-	 *  if we're undocked.
-	 */
-	if (!dlpc_init() && dock_present()) {
+	dock_err = dlpc_init();
+
+	/* We prefer Legacy I/O module over docking */
+	if (legacy_io_present()) {
+		legacy_io_init();
+		early_superio_config();
+	} else if (!dock_err && dock_present()) {
 		dock_connect();
 		early_superio_config();
-		/* Set up the console */
 	}
 
 #if CONFIG_USBDEBUG
@@ -239,6 +244,7 @@ void main(unsigned long bist)
 	early_usbdebug_init();
 #endif
 
+	/* Setup the console */
 	console_init();
 
 	/* Halt if there was a built in self test failure */




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