[coreboot] Getting serial output from w83627hf?
peter at stuge.se
Mon Oct 17 18:21:13 CEST 2011
QingPei Wang wrote:
> the superio part should placed under the LCP bridge.
> for your mainboard,
> it should under
> " device pci 1f.0 on end # LPC bridge
The "end" on this line goes after the newly introduced chip block.
> add the superio things like:
> device pci 1f.0 on end # LPC bridge
So the above line should be:
device pci 1f.0 on # LPC bridge
Followed by the newly added chip block:
> chip superio/winbond/w83627hf
> device pnp 2e.0 on # Floppy
> io 0x60 = 0x3f0
> irq 0x70 = 6
> drq 0x74 = 2
And finally the end for the 1f.0 pci device:
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