[coreboot] New patch to review for coreboot: 3c5985b sb600: Implement EHCI workaround

[Patrick Georgi (patrick@georgi-clan.de)]

Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/345

-gerrit

commit 3c5985bcc27c9c5349451571cbf7dd20f8a354d4
Author: Patrick Georgi <patrick.georgi at secunet.com>
Date:   Fri Oct 28 09:01:54 2011 +0200

    sb600: Implement EHCI workaround
    
    Linux implements it itself, but older Linuxes and other systems
    might not. Without this, the host controller might not respond
    to drivers.
    
    Change-Id: I4ff0e3683c02e7aa00d188428847c64c4c5d589d
    Signed-off-by: Patrick Georgi <patrick.georgi at secunet.com>
---
 src/southbridge/amd/sb600/usb.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/src/southbridge/amd/sb600/usb.c b/src/southbridge/amd/sb600/usb.c
index 7539f08..7ff8f5c 100644
--- a/src/southbridge/amd/sb600/usb.c
+++ b/src/southbridge/amd/sb600/usb.c
@@ -119,6 +119,11 @@ static void usb_init2(struct device *dev)
 	dword &= ~(1 << 28);
 	pci_write_config32(dev, 0x50, dword);
 
+	/* EHCI Erratum (adapted from Linux) */
+	dword = pci_read_config32(dev, 0x53);
+	dword |= (1 << 3);
+	pci_write_config32(dev, 0x53, dword);
+
 	/* RPR5.14 Disable USB PHY PLL Reset signal to come from ACPI */
 	byte = pci_read_config8(dev, 0x54);
 	byte &= ~(1 << 0);