[coreboot] E350M1 does not POST
Kerry.She at amd.com
Thu Sep 8 09:30:45 CEST 2011
> -----Original Message-----
> From: coreboot-bounces at coreboot.org
[mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Scott Duplichan
> Sent: Thursday, September 08, 2011 3:09 PM
> To: 'Marshall Buschman'; coreboot at coreboot.org
> Subject: Re: [coreboot] E350M1 does not POST
> Marshall Buschman wrote:
> ]Hello Kerry:
> ]I have tested your patch set, and it does make the E350M1 boot.
> ]The bad news is there is now a delay of approximately 5 minutes and
> ]seconds before any serial output is displayed.
> ]The coreboot log is available at
> ]Please let me know if I can assist further.
> ]Thank you!
> ]-Marshall Buschman
> The problem of early serial output causing a large boot delay is not
> is caused by serial port logging before the SB800 LPC clock is
> and/or serial port logging before the SIO baud rate is setup. The
> LPC clock fix was in romstage.c, then later moved to sb800
> function enable_clocks(). Marshall's log file is missing the following
> serial output, which suggests a problem with the needed early SB800
> clock programming, or SIO baud rate programming:
> POST: 0x30
> SB800 - Cfg.c - sb800_cimx_config - Start.
> SB800 - Cfg.c - sb800_cimx_config - End.
> POST: 0x31
> I am not in a position to try this on real hardware, but I did do a
> simnow test. It looks like function enable_clocks() is correctly
> before the first serial output. But the above lines of early serial
> are logged before the SIO baud rate is programmed. Here is some
> of this problem:
> That old patch should overcome the problem for the above post code
This is quite helpful information,
we should print after the console initialization was done.
> But the new SB800 logging in sb800_cimx_config() probably needs
I agree to remove the logging.
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