[coreboot] Dual SPI Flash adapter
oliver at schinagl.nl
Thu Apr 5 01:40:20 CEST 2012
On 04/05/12 01:23, Peter Stuge wrote:
> Oliver Schinagl wrote:
>> Unfortunately I have had little feedback so far. But here's a small
> Thanks for the update.
> I did look at your previous board but needed more time to really look
That would be grand!
>> I have finally received my SO8 memory modules and those babies are
> Oh it's not so bad. :) Try the 0603 resistors.
>> Because of this, I have replaced the SO8M footprint with an SO8W
> This is actually correct. All SPI flash chips used in PCs are in the
> 200 mil wide package, not the standard SO8 which is only 150 mil.
There are 3 SO8 package footprints in PCB, SO8, SO8M and SO8W. None fit
'perfectly'. S08 is way to small to be usefull, SO8M fits 'perfectly'
but makes it extremly hard to solder I recon, since the pad, ends at the
legs. SO8W seems to be a little to wide, the legs end up perfectly on
the inner sides, which might make it not to cover the back 'cavities'
perfectly? But I guess it will have to do.
The PCB's that I used as inspiration actually do fit perfectly :)
>> I've also saw a screenshot of an Asus motherboard that had the bios chip
>> right next to a Sata port, in the wrong/different orientation, so I've
>> added a 3rd design so all 3 possible insertations are possible. (Left,
>> center and right facing connector).
> Ah, so the plan is that your PCB is plugged into the factory BIOS
> socket? That's a nice idea, but as you discovered there are four ways
> that the chip can be oriented, so you really have to make four
> boards to have a solution that works on every board. :\
Yes, the plan was to have the PCB go into the motherboard, and the
original bios piggy bags ontop! The
Well, 4 orientations, but I think 1 can be used for 2 orientations. It
all depends on what is blocking your board however.
I hope it's quite unlikly that a bios is constrained on 3 sides, but as
always possible. If I get bored later this week, I may end up making the
missing 4th design then, where the socket sits 'sideways'. Should be
considerably easier to route then the ones I have now ...
>> I've attached the gEDA .pcb file with the 3 orientation,
> Thanks. I'll try to give some more detailed feedback, but one big
> no-no that I've seen already is that your silk is covering pads.
> Noone will do any cropping for you, so you will indeed get silkscreen
> on your pads, which 1) potentially makes the board house unhappy
> because it may make a mess in their machines, and 2) makes it
> difficult for solder to flow over the pad.
Hmm, I assumed silk screening is applied last, as I have seen
soldermasks and silkscreening covering via's. The only thing I cover IS
via's ... because of that assumption.
>> When sending out the final rev. I'll copy/paste the silk screens
>> from the left design so they all look identical.
> No, please do not make design changes post final review. Another way
> to express this is please only send files for review that you believe
> that you are finished with. Of course there can be iterations and
> that's fine! But don't make further changes after the final
I should have clarified this yes, I would of course have posted the
final version that would have been sent off to the board house. But that
version will fail DRC checking :(
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