[coreboot] Binary blobs in the source tree (was: Re: New patch to review for coreboot: e4fc528 Add the memory reference code binary for sandybridge chipsets)
ajg4tadpole at gmail.com
Mon Apr 16 09:53:56 CEST 2012
To be honest I don't see the difference between having binary blobs in a
separate repo and having them in the main coreboot repo. Apart that is
from the slightly meaningless saying that the whole coreboot tree is GPL
compatible. It seems more relevant to be able to say that about a
particular port. So AMD chipsets will be fully GPL whereas Intel
chipsets will not. This is regardless of where the blobs are actually
stored. And aside of the question of where and how microcode is executed.
So the big question is really do we allow chipset support that requires
the use of binary blobs in coreboot. If yes then those blobs may as well
reside in the coreboot repo as anywhere else because you're going to
need them to build a port.
In my view microcode and MRC are roughly equivalent. The method of
executing the microcode is just different and that microcode is executed
by the CPU in a different operating mode but it most certainly does go
away and come back and the CPU state has changed by doing so. So it is a
slippery slope and we have already started on it and I see no practical
way back now.
PS I am really excited to see SandyBridge support coming in, I may
actually be able to use coreboot in a project now.
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