[coreboot] Patch set updated for coreboot: 19f7cf6 Do not produce temp s3.rom if the board doesn't need it.

Zheng Bao (zheng.bao@amd.com) gerrit at coreboot.org
Thu Apr 19 05:25:47 CEST 2012


Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/902

-gerrit

commit 19f7cf6e5151a43116d1669776f32cc220ca181e
Author: zbao <fishbaozi at gmail.com>
Date:   Thu Apr 19 12:42:51 2012 +0800

    Do not produce temp s3.rom if the board doesn't need it.
    
    S3.rom is useless for all the other boards which don't use flash to
    save sleep/wakeup settings. AGESA-based boards other than persimmon
    haven't been validated the S3 resume. They don't need S3.rom yet.
    
    Change-Id: I12693e9556ca6f8e0d80b2ab2dca5c85bdb97685
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: zbao <fishbaozi at gmail.com>
---
 src/southbridge/amd/Makefile.inc |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/southbridge/amd/Makefile.inc b/src/southbridge/amd/Makefile.inc
index f4a9cbb..d7b5645 100644
--- a/src/southbridge/amd/Makefile.inc
+++ b/src/southbridge/amd/Makefile.inc
@@ -15,14 +15,18 @@ subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB700) += cimx
 subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800) += cimx
 subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900) += cimx
 
+ifeq ($(CONFIG_HAVE_ACPI_RESUME), y)
+ifeq ($(CONFIG_CPU_AMD_AGESA), y)
+
 $(obj)/s3.rom:
 	echo "    S3 NVRAM   0xffff0000 (S3 storage area)"
 	awk 'BEGIN {for (i=0; i<20480; i++) {printf "%c", 255}}' > $@.tmp
 	mv $@.tmp $@
 
-ifeq ($(CONFIG_HAVE_ACPI_RESUME), y)
 cbfs-files-y += s3nv
 s3nv-file := $(obj)/s3.rom
 s3nv-position := 0xffff0000
 s3nv-type := raw
-endif
+
+endif # CONFIG_CPU_AMD_AGESA == y
+endif # CONFIG_HAVE_ACPI_RESUME == y




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