[coreboot] Patch set updated for coreboot: 5710acf Replicate TOP_MEM and TOP_MEM2 from BSP to AP CPU

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Fri Aug 3 11:40:58 CEST 2012


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1388

-gerrit

commit 5710acf9a3d8a8f92ec8e603c6c434ec54049d82
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Wed Aug 1 14:32:13 2012 +0300

    Replicate TOP_MEM and TOP_MEM2 from BSP to AP CPU
    
    The search loop for UMA resource was only used to check for the highest
    RAM address below 4GB. The cached values from BSP CPU can now be used
    for the replication.
    
    Change-Id: I5244ffa6f8a93f5ff5aaf8a71bd006b0f9cd518a
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/amd/mtrr/amd_mtrr.c |   49 ++++++++++++++++++------------------------
 1 files changed, 21 insertions(+), 28 deletions(-)

diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index 9349ad4..bff6702 100644
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -102,20 +102,6 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
 
 }
 
-static void uma_fb_resource(void *gp, struct device *dev, struct resource *res)
-{
-	struct mem_state *state = gp;
-	unsigned long topk;
-
-	topk = resk(res->base + res->size);
-	if (state->tom2k < topk) {
-		state->tom2k = topk;
-	}
-	if ((topk < 4*1024*1024) && (state->tomk < topk)) {
-		state->tomk = topk;
-	}
-}
-
 /* These will likely move to some device node or cbmem. */
 static uint64_t amd_topmem = 0;
 static uint64_t amd_topmem2 = 0;
@@ -154,6 +140,25 @@ void setup_bsp_ramtop(void)
 	amd_topmem2 = (uint64_t) msr2.hi<<32 | msr2.lo;
 }
 
+static void setup_ap_ramtop(void)
+{
+	msr_t msr;
+	uint64_t v;
+
+	v = bsp_topmem();
+	if (!v)
+		return;
+
+	msr.hi = v >> 32;
+	msr.lo = (uint32_t) v;
+	wrmsr(TOP_MEM, msr);
+
+	v = bsp_topmem2();
+	msr.hi = v >> 32;
+	msr.lo = (uint32_t) v;
+	wrmsr(TOP_MEM2, msr);
+}
+
 void amd_setup_mtrrs(void)
 {
 	unsigned long address_bits;
@@ -185,9 +190,6 @@ void amd_setup_mtrrs(void)
 
 	state.tomk = state.tom2k = 0;
 	search_global_resources(
-		IORESOURCE_MEM | IORESOURCE_UMA_FB, IORESOURCE_MEM | IORESOURCE_UMA_FB,
-		uma_fb_resource, &state);
-	search_global_resources(
 		IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
 		set_fixed_mtrr_resource, &state);
 
@@ -195,20 +197,11 @@ void amd_setup_mtrrs(void)
 
 	disable_cache();
 
-	/* Round state.tomk up to the next greater size that will fit in TOP_MEM */
-	state.tomk = (state.tomk + TOP_MEM_MASK_KB) & ~TOP_MEM_MASK_KB;
-	msr.hi = state.tomk >> 22;
-	msr.lo = state.tomk << 10;
-	wrmsr(TOP_MEM, msr);
+	setup_ap_ramtop();
 
 	/* if DRAM above 4GB: set SYSCFG_MSR_TOM2En and SYSCFG_MSR_TOM2WB */
 	sys_cfg.lo &= ~(SYSCFG_MSR_TOM2En | SYSCFG_MSR_TOM2WB);
-	if(state.tom2k > (4*1024*1024)) {
-		/* Round state.tomk up to the next greater size that will fit in TOP_MEM2 */
-		state.tom2k = (state.tom2k + TOP_MEM_MASK_KB) & ~TOP_MEM_MASK_KB;
-		msr.hi = state.tom2k >> 22;
-		msr.lo = state.tom2k << 10;
-		wrmsr(TOP_MEM2, msr);
+	if (bsp_topmem2() > (uint64_t)1<<32) {
 		sys_cfg.lo |= SYSCFG_MSR_TOM2En;
 		if(has_tom2wb)
 			sys_cfg.lo |= SYSCFG_MSR_TOM2WB;




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