[coreboot] New patch to review for coreboot: 26538f0 Sandy/Ivy Bridge and Cougar/Panther Point: Fix names

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1413

-gerrit

commit 26538f0559a2ab70b085029441fc421ea3aec607
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Wed Jul 25 16:10:36 2012 -0700

    Sandy/Ivy Bridge and Cougar/Panther Point: Fix names
    
    The names were set at various times during development, but
    the way the code works, you might end up with the wrong name
    being displayed in the logs. Instead of doing magic, just
    display both names for each component
    
    Change-Id: I1f8ce44d156442f5f7d717e1a2b47ed1218d4527
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
 src/northbridge/intel/sandybridge/northbridge.c |    2 +-
 src/southbridge/intel/bd82x6x/Kconfig           |   12 ------------
 src/southbridge/intel/bd82x6x/pch.c             |    2 +-
 3 files changed, 2 insertions(+), 14 deletions(-)

diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index b447d52..fb0b4cb 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -511,6 +511,6 @@ static void enable_dev(device_t dev)
 }
 
 struct chip_operations northbridge_intel_sandybridge_ops = {
-	CHIP_NAME("Intel i7 (Sandybridge) integrated Northbridge")
+	CHIP_NAME("Intel i7 (SandyBridge/IvyBridge) integrated Northbridge")
 	.enable_dev = enable_dev,
 };
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index 33dfe9d..a7d41dc 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -56,15 +56,3 @@ config SERIRQ_CONTINUOUS_MODE
 	  operated in continuous mode.
 
 endif
-
-if SOUTHBRIDGE_INTEL_BD82X6X
-config PCH_CHIP_NAME
-	string
-	default "Cougar Point"
-endif
-
-if SOUTHBRIDGE_INTEL_C216
-config PCH_CHIP_NAME
-	string
-	default "Panther Point"
-endif
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 3c448de..d8a919d 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -405,6 +405,6 @@ void pch_enable(device_t dev)
 }
 
 struct chip_operations southbridge_intel_bd82x6x_ops = {
-	CHIP_NAME("Intel Series 6/7 (" CONFIG_PCH_CHIP_NAME ") Southbridge")
+	CHIP_NAME("Intel Series 6/7 (Cougar Point/Panther Point) Southbridge")
 	.enable_dev = pch_enable,
 };