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iv>Yeah.=A0 That sounds bogus. <br></div><div><br>=A0</div><blockquote clas=
s=3D"gmail_quote" style=3D"border-left: 1px solid rgb(204, 204, 204); margi=
n: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
<div><div style=3D""><div style=3D"font-family: times new roman,new york,ti=
mes,serif; font-size: 12pt;">So my question is:</div><div style=3D"font-fam=
ily: times new roman,new york,times,serif; font-size: 12pt;">What is the se=
quence of coreboot start-up for 32-bits x86 after entry32.inc (post code 0x=
10). What code is executed next before hardwaremain.</div>
</div></div></blockquote><div>I would look at <br>src/cpu/via/car/cache_as_=
ram.inc<br>which calls amd64_main() in <br>src/mainboard/via/epia-m700/cach=
e_as_ram_auto.c<br><br>I'm not exactly sure the path it takes, but cach=
e_as_ram.inc is very early.=A0 Hopefully you'll be able to insert some =
post codes there and see them.<br>
<br>Thanks,<br>Myles<br><br>=A0</div></div><br>

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