[coreboot] tiny bootblock problem

[Nils]

Patrick Georgi wrote:
>> Correct me if i'm wrong but Geode GX2/LX doesn't have MTRRs.
>> Cache is setup via MSR registers.
>MTRR is usually configured via MSR (0x200 to 0x210, specifically). Not 
>sure if Geode does it the same way, but MSR doesn't mean "no MTRR".

See attachment for part of page 494 of the GX2 databook.:)

Philip Prindeville wrote:
>Caching is bits 30:29 of CR0.

There are actually a lot more MSR registers for defining cache regions.

Thanks, Nils. 
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