[coreboot] New patch to review for coreboot: ed3a3f3 APIC: Fixed reading MSR_FSB_FREQ register
Vikram Narayanan (vikram186@gmail.com)
gerrit at coreboot.org
Sat Jan 14 10:12:55 CET 2012
Vikram Narayanan (vikram186 at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/536
-gerrit
commit ed3a3f37393055b8a85929db43df46077c994320
Author: Vikram Narayanan <vikram186 at gmail.com>
Date: Sat Jan 14 14:31:23 2012 +0530
APIC: Fixed reading MSR_FSB_FREQ register
According to Intel's manual, bits 0:2 of MSR 0xCDh gives the FSB
frequency. But the code had a right shift of 4 which will always
give 267 MHz, as the valid bits are shifted to right.
Change-Id: I6d24f68edb4fa3ee739d63461a17f4458c90481b
Signed-off-by: Vikram Narayanan <vikram186 at gmail.com>
---
src/cpu/x86/lapic/apic_timer.c | 28 +++++++++-------------------
1 files changed, 9 insertions(+), 19 deletions(-)
diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c
index 312951a..0b56fd5 100644
--- a/src/cpu/x86/lapic/apic_timer.c
+++ b/src/cpu/x86/lapic/apic_timer.c
@@ -27,10 +27,10 @@
* memory init.
*/
-#define FSB_CLOCK_STS 0xCD
+#define FSB_CLOCK_STS 0xcd
#define FSB_FREQ_MASK 0x07
-static u32 timer_fsb = 200; // default to 200MHz
+static u32 timer_fsb = 200; // default to 200MHz
void init_timer(void)
{
@@ -43,26 +43,16 @@ void init_timer(void)
lapic_write(LAPIC_TDCR, LAPIC_TDR_DIV_1);
/* Set the initial counter to 0xffffffff */
- lapic_write(LAPIC_TMICT, ~0UL);
+ lapic_write(LAPIC_TMICT, 0xffffffff);
/* Set FSB frequency to a reasonable value */
fsb_clock_sts = rdmsr(FSB_CLOCK_STS);
switch (fsb_clock_sts.lo & FSB_FREQ_MASK) {
- case 0:
- timer_fsb = 266;
- break;
- case 1:
- timer_fsb = 133;
- break;
- case 2:
- timer_fsb = 200;
- break;
- case 3:
- timer_fsb = 166;
- break;
- case 5:
- timer_fsb = 100;
- break;
+ case 0: timer_fsb = 266; break;
+ case 1: timer_fsb = 133; break;
+ case 2: timer_fsb = 200; break;
+ case 3: timer_fsb = 166; break;
+ case 5: timer_fsb = 100; break;
}
}
@@ -74,5 +64,5 @@ void udelay(u32 usecs)
start = lapic_read(LAPIC_TMCCT);
do {
value = lapic_read(LAPIC_TMCCT);
- } while ((start - value) < ticks);
+ } while((start - value) < ticks);
}
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