[coreboot] New patch to review for coreboot: 00d2638 i3100: Add init sequence

[Sven Schnelle (svens@stackframe.org)]

Sven Schnelle (svens at stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/600

-gerrit

commit 00d263825b8deaddd8a6bf573bc97fb625f22bdf
Author: Sven Schnelle <svens at stackframe.org>
Date:   Tue Jan 31 22:40:50 2012 +0100

    i3100: Add init sequence
    
    i3100 misses the magic SATA init sequence, which makes all
    requests fail. Captured from the vendor BIOS, which writes
    those bits on all configurations.
    
    Change-Id: I293b7d9cd681181311ecaced6d7df9b2706c711f
    Signed-off-by: Sven Schnelle <svens at stackframe.org>
---
 src/southbridge/intel/i3100/sata.c |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/src/southbridge/intel/i3100/sata.c b/src/southbridge/intel/i3100/sata.c
index af22600..1925f88 100644
--- a/src/southbridge/intel/i3100/sata.c
+++ b/src/southbridge/intel/i3100/sata.c
@@ -81,6 +81,24 @@ static void sata_init(struct device *dev)
 	  pci_write_config8(dev, SATA_PCS + 1, 0x0f);
 
 	}
+
+	/* secret init sequence, required */
+	pci_write_config32(dev, 0x94, 0x00400180);
+	pci_write_config32(dev, 0xa0, 0x18);
+	pci_write_config32(dev, 0xa4, 0x224);
+	pci_write_config32(dev, 0xa0, 0x42);
+	pci_write_config32(dev, 0xa4, 0x22006d);
+	pci_write_config32(dev, 0xa0, 0x84);
+	pci_write_config32(dev, 0xa4, 0x24);
+	pci_write_config32(dev, 0xa0, 0x7a);
+	pci_write_config32(dev, 0xa4, 0x220000);
+	pci_write_config32(dev, 0xa0, 0x9c);
+	pci_write_config32(dev, 0xa4, 0x24);
+	pci_write_config32(dev, 0xa0, 0x90);
+	pci_write_config32(dev, 0xa4, 0x220000);
+	pci_write_config32(dev, 0xa0, 0xa0);
+	pci_write_config32(dev, 0xa4, 0x12492aa);
+
 	printk(BIOS_DEBUG, "SATA Enabled\n");
 }