[coreboot] New patch to review for coreboot: dddbbed AMD Family15tn: Set the mask of MTRR to 0000FFFXX0000800

[Zheng Bao (zheng.bao@amd.com)]

Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1349

-gerrit

commit dddbbed1725ae8a781c3cecd39d3cf5e354d33ff
Author: zbao <fishbaozi at gmail.com>
Date:   Tue Jul 24 17:56:48 2012 +0800

    AMD Family15tn: Set the mask of MTRR to 0000FFFXX0000800
    
    Remove the warning message from linux dmesg,
    mtrr: your BIOS has configured as incorrect mask, fixing it.
    
    Change-Id: I355509db12ab10c33b7c1c23e2c7c4783f30e67e
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: zbao <fishbaozi at gmail.com>
---
 src/mainboard/amd/dinar/agesawrapper.c   |    2 +-
 src/mainboard/amd/parmer/agesawrapper.c  |    2 +-
 src/mainboard/amd/torpedo/agesawrapper.c |    2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/amd/dinar/agesawrapper.c b/src/mainboard/amd/dinar/agesawrapper.c
index 171deb8..a8ec917 100644
--- a/src/mainboard/amd/dinar/agesawrapper.c
+++ b/src/mainboard/amd/dinar/agesawrapper.c
@@ -270,7 +270,7 @@ agesawrapper_amdinitmmio (
 	/* Set ROM cache onto WP to decrease post time */
 	MsrReg = (0x0100000000 - CONFIG_ROM_SIZE) | 5;
 	LibAmdMsrWrite (0x20E, &MsrReg, &StdHeader);
-	MsrReg = (0x1000000000 - CONFIG_ROM_SIZE) | 0x800;
+	MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800;
 	LibAmdMsrWrite (0x20F, &MsrReg, &StdHeader);
 
 	Status = AGESA_SUCCESS;
diff --git a/src/mainboard/amd/parmer/agesawrapper.c b/src/mainboard/amd/parmer/agesawrapper.c
index 6f44d46..b82c1c1 100644
--- a/src/mainboard/amd/parmer/agesawrapper.c
+++ b/src/mainboard/amd/parmer/agesawrapper.c
@@ -166,7 +166,7 @@ agesawrapper_amdinitmmio (
 	/* Set ROM cache onto WP to decrease post time */
 	MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull;
 	LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
-	MsrReg = (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800ull;
+	MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800ull;
 	LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
 
 	Status = AGESA_SUCCESS;
diff --git a/src/mainboard/amd/torpedo/agesawrapper.c b/src/mainboard/amd/torpedo/agesawrapper.c
index 2995856..2bd1725 100644
--- a/src/mainboard/amd/torpedo/agesawrapper.c
+++ b/src/mainboard/amd/torpedo/agesawrapper.c
@@ -281,7 +281,7 @@ agesawrapper_amdinitmmio (
   /* Set ROM cache onto WP to decrease post time */
   MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull;
   LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
-  MsrReg = (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800ull;
+  MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800ull;
   LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
 
   /* Clear all pending SMI. On S3 clear power button enable so it wll not generate an SMI */