[coreboot] New patch to review for coreboot: 7e2ee67 x86emu: Add an RDTSC implementation to the x86 emulator

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1362

-gerrit

commit 7e2ee67a5b61e66390413d13c7ca62daad272f02
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Thu Jul 26 15:15:38 2012 -0700

    x86emu: Add an RDTSC implementation to the x86 emulator
    
    This instruction is being used in some debug VBIOSes.  This implementation
    doesn't even try to be accurate.  Instead, it just increments the counter by a
    fixed amount every time an rdtsc instruction in encountered, to avoid divides
    by zero.
    
    Imported from:
    http://cgit.freedesktop.org/xorg/xserver/commit/?id=c4b7e9d1c16797c3e4b1200b40aceab5696a7fb8
    
    Change-Id: I8fba1a060c57ccb7bbd44aa321dd349bc56bf574
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
 src/devices/oprom/x86emu/ops2.c |   36 +++++++++++++++++++++++++++++++++++-
 1 files changed, 35 insertions(+), 1 deletions(-)

diff --git a/src/devices/oprom/x86emu/ops2.c b/src/devices/oprom/x86emu/ops2.c
index 4000bc3..5fbed67 100644
--- a/src/devices/oprom/x86emu/ops2.c
+++ b/src/devices/oprom/x86emu/ops2.c
@@ -156,6 +156,40 @@ static void x86emuOp2_wrmsr(u8 op2)
 }
 
 /****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0x31
+****************************************************************************/
+static void x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
+{
+#ifdef __HAS_LONG_LONG__
+  static u64 counter = 0;
+#else
+  static u32 counter = 0;
+#endif
+
+  counter += 0x10000;
+
+  /* read timestamp counter */
+  /*
+   * Note that instead of actually trying to accurately measure this, we just
+   * increase the counter by a fixed amount every time we hit one of these
+   * instructions.  Feel free to come up with a better method.
+   */
+  START_OF_INSTR();
+  DECODE_PRINTF("RDTSC\n");
+  TRACE_AND_STEP();
+#ifdef __HAS_LONG_LONG__
+  M.x86.R_EAX = counter & 0xffffffff;
+  M.x86.R_EDX = counter >> 32;
+#else
+  M.x86.R_EAX = counter;
+  M.x86.R_EDX = 0;
+#endif
+  DECODE_CLEAR_SEGOVR();
+  END_OF_INSTR();
+}
+
+/****************************************************************************
  * REMARKS:
  * Handles opcode 0x0f,0x32
  * ****************************************************************************/
@@ -1728,7 +1762,7 @@ void (*x86emu_optab2[256])(u8) =
 /*  0x2f */ x86emuOp2_illegal_op,
 
 /*  0x30 */ x86emuOp2_wrmsr,
-/*  0x31 */ x86emuOp2_illegal_op,
+/*  0x31 */ x86emuOp2_rdtsc,
 /*  0x32 */ x86emuOp2_rdmsr,
 /*  0x33 */ x86emuOp2_illegal_op,
 /*  0x34 */ x86emuOp2_illegal_op,