[coreboot] PCIe devices not enabled on amd/persimmon
Wolfgang Kamp - datakamp
wmkamp at datakamp.de
Fri Jun 8 08:45:35 CEST 2012
Hello Andy,
I think this issue is due to a failure in the coreboot initialization routine for the SB800 southbridge.
This issue is not yet solved.
I posted about this problem already in January.
I found a problem with the PCI enumeration of the PCIe Ports in the CIMX/SB800 Southbridge for the INAGUA platform.
The .../southbridge/amd/cimx/sb800/late.c routine calls the function sb_Before_PCI_Init after
case (0x16 >>3) | 2. This means when the PCI Express ports (0x15 <<3) | 0 are probed in the routine ../devices/pci_device.c function
pci_probe_dev they are not yet initialized. The probing fails and also devices behind the bridge are not recognized.
Behind the PCIe bridge I have an Intel 82574 LAN chip.
But if I move the call to sb_Before_PCI_Init behind case (0x15 <<3) | 0 the enumeration succeed but coreboot crashes later into nothing. The Sage Debugger fails.
I can't imagine why.
Regards
Wolfgang
Von: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org] Im Auftrag von Andy Sharp
Gesendet: Donnerstag, 7. Juni 2012 22:31
An: coreboot at coreboot.org
Betreff: [coreboot] PCIe devices not enabled on amd/persimmon
Howdy,
I've got an AMD/persimmon board, with the agesa family 14 northbridge on the CPU, and the SB800 southbridge. Both have 4 PCIe ports on them, but coreboot isn't enabling or enumerating any of the PCIe devices on the SB800. Does anyone have any ideas for me? The two devices on that southbridge are an NEC USB3 and a Mini-PCIe slot.
Pasting the console output below for those interested:
coreboot-persimmon1-278-gbbca20f-dirty Wed May 23 12:48:37 PDT 2012 starting...
POST: 0x34
BSP Family_Model: 00500f20
cpu_init_detectedx = 00000000
POST: 0x35
agesawrapper_amdinitmmio passed.
POST: 0x37
agesawrapper_amdinitreset passed.
POST: 0x39
agesawrapper_amdinitearly POST: 0x34
BSP Family_Model: 00500f20
cpu_init_detectedx = 00000001
POST: 0x35
agesawrapper_amdinitmmio passed.
POST: 0x37
agesawrapper_amdinitreset passed.
POST: 0x39
agesawrapper_amdinitearly passed.
SLP_TYP type was 0
POST: 0x40
agesawrapper_amdinitpost
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
EventLog: EventClass = 2, EventInfo = 8040100.
Param1 = a00a, Param2 = 0.
Param3 = 0, Param4 = 0.
SLP_TYP type was 0
error level: 4
POST: 0x42
agesawrapper_amdinitenv SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
passed.
POST: 0x43
POST: 0x44
POST: 0x50
Loading image.
CBFS: Looking for 'fallback/coreboot_ram'
CBFS: found.
CBFS: loading stage fallback/coreboot_ram @ 0x200000 (1441792 bytes), entry @ 0x200000
Jumping to image.
POST: 0x80
POST: 0x39
coreboot-persimmon1-278-gbbca20f-dirty Wed May 23 12:48:37 PDT 2012 booting..
POST: 0x40
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.3: enabled 0
PNP: 004e.4: enabled 0
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 0
PNP: 004e.a: enabled 0
PNP: 004e.10: enabled 1
PNP: 004e.11: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
Compare with tree...
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.3: enabled 0
PNP: 004e.4: enabled 0
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 0
PNP: 004e.a: enabled 0
PNP: 004e.10: enabled 1
PNP: 004e.11: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
Mainboard Persimmon Enable.
SLP_TYP type was 0
persimmon_enable, TOP MEM: msr.lo = 0x7f000000, msr.hi = 0x00000000
persimmon_enable, TOP MEM2: msr2.lo = 0x00000000, msr2.hi = 0x00000000
persimmon_enable: uma size 0x18000000, memory start 0x67000000
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
APIC_CLUSTER: 0 scanning...
AP siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [1022/1510] ops
PCI: 00:000 [1022/1510] enabled
PCI: 00:01.0 [1002/9804] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1022/1512] enabled
sb800_enable() SLP_TYP type was 0
PCI: 00:11.0 [1002/4393] ops
PCI: 00:11.0 [1002/4393] enabled
sb800_enable() PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
sb800_enable() PCI: Static device PCI: 00:12.1 not found, disabling it.
sb800_enable() PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
sb800_enable() PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
sb800_enable() PCI: Static device PCI: 00:13.1 not found, disabling it.
sb800_enable() PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
sb800_enable() sm_init().
IOAPIC: Clearing IOAPIC at 0xfec00000
IOAPIC: 23 interrupts
IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: 23 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
PCI: 00:14.0 [1002/4385] enabled
sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it.
sb800_enable() hda enabled
PCI: 00:14.2 [1002/4383] ops
PCI: 00:14.2 [1002/4383] enabled
sb800_enable() PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
sb800_enable() PCI: 00:14.4 [1002/4384] bus ops
PCI: 00:14.4 [1002/4384] enabled
sb800_enable() PCI: 00:14.5 [1002/4399] ops
PCI: 00:14.5 [1002/4399] enabled
sb800_enable() sb800_enable() sb800_enable() sb800_enable() sb800_enable() sb800_enable() PCI: 00:18.0 [1022/1700] enabled
PCI: 00:18.1 [1022/1701] enabled
PCI: 00:18.2 [1022/1702] enabled
PCI: 00:18.3 [1022/1703] enabled
PCI: 00:18.4 [1022/1704] enabled
PCI: 00:18.5 [1022/1718] enabled
PCI: 00:18.6 [1022/1716] enabled
PCI: 00:18.7 [1022/1719] enabled
POST: 0x25
PCI: Left over static devices:
PCI: 00:01.1
PCI: Check your devicetree.cb.
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 01
POST: 0x24
PCI: 01:00.0 [10ec/8168] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=001
POST: 0x55
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
do_pci_scan_bridge returns max 1
scan_static_bus for PCI: 00:14.3
PNP: 004e.0 disabled
PNP: 004e.3 disabled
PNP: 004e.4 disabled
PNP: 004e.5 enabled
PNP: 004e.6 disabled
PNP: 004e.a disabled
PNP: 004e.10 enabled
PNP: 004e.11 disabled
scan_static_bus for PCI: 00:14.3 done
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 02
POST: 0x24
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
do_pci_scan_bridge returns max 2
PCI: pci_scan_bus returning with max=002
POST: 0x55
scan_static_bus for Root Device done
done
POST: 0x66
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
Fam14h - cpu_bus_read_resources.
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC: 01 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
Fam14h - domain_read_resources.
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
Fam14h - read_resources.
PCI: 00:04.0 read_resources bus 1 link: 0
PCI: 00:04.0 read_resources bus 1 link: 0 done
PCI: 00:14.0 read_resources bus 0 link: 0
I2C: 00:50 missing read_resources
I2C: 00:51 missing read_resources
PCI: 00:14.0 read_resources bus 0 link: 0 done
SB800 - Lpc.c - lpc_read_resources - Start.
SB800 - Lpc.c - lpc_read_resources - End.
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 2 link: 0
PCI: 00:14.4 read_resources bus 2 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC_CLUSTER: 0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
APIC: 00
APIC: 01
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:01.0
PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
PCI: 00:04.0 child on link 0 PCI: 01:00.0
PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.1
PCI: 00:12.2
PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.1
PCI: 00:13.2
PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
PCI: 00:14.0 child on link 0 I2C: 00:50
I2C: 00:50
I2C: 00:51
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.3 child on link 0 PNP: 004e.0
PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 004e.0
PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 004e.3
PNP: 004e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.4
PNP: 004e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 004e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
PNP: 004e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
PNP: 004e.6
PNP: 004e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.a
PNP: 004e.10
PNP: 004e.10 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.11
PNP: 004e.11 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PCI: 00:14.4
PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:14.5
PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:15.0
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.0
PCI: 00:16.2
PCI: 00:18.0
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:18.6
PCI: 00:18.7
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xff] io
PCI: 00:04.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:04.0 1c * [0x0 - 0xfff] io
PCI: 00:01.0 14 * [0x1000 - 0x10ff] io
PCI: 00:11.0 20 * [0x1400 - 0x140f] io
PCI: 00:11.0 10 * [0x1410 - 0x1417] io
PCI: 00:11.0 18 * [0x1418 - 0x141f] io
PCI: 00:11.0 14 * [0x1420 - 0x1423] io
PCI: 00:11.0 1c * [0x1424 - 0x1427] io
PCI_DOMAIN: 0000 compute_resources_io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 20 * [0x0 - 0x3fff] prefmem
PCI: 01:00.0 18 * [0x4000 - 0x4fff] prefmem
PCI: 00:04.0 compute_resources_prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 30 * [0x0 - 0x1ffff] mem
PCI: 00:04.0 compute_resources_mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 * [0x0 - 0xfffffff] prefmem
PCI: 00:04.0 24 * [0x10000000 - 0x100fffff] prefmem
PCI: 00:04.0 20 * [0x10100000 - 0x101fffff] mem
PCI: 00:01.0 18 * [0x10200000 - 0x1023ffff] mem
PCI: 00:14.2 10 * [0x10240000 - 0x10243fff] mem
PCI: 00:12.0 10 * [0x10244000 - 0x10244fff] mem
PCI: 00:13.0 10 * [0x10245000 - 0x10245fff] mem
PCI: 00:14.5 10 * [0x10246000 - 0x10246fff] mem
PCI: 00:11.0 24 * [0x10247000 - 0x102473ff] mem
PCI: 00:12.2 10 * [0x10247400 - 0x102474ff] mem
PCI: 00:13.2 10 * [0x10247500 - 0x102475ff] mem
PCI: 00:14.3 a0 * [0x10247600 - 0x10247600] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 10247601 size: 10247601 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 00:04.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:11.0
constrain_resources: PCI: 00:12.0
constrain_resources: PCI: 00:122
constrain_resources: PCI: 00:13.0
constrain_resources: PCI: 00:13.2
constrain_resources: PCI: 00:14.0
constrain_resources: I2C: 00:50
constrain_resources: I2C: 00:51
constrain_resources: PCI: 00:14.2
constrain_resources: PCI: 00:14.3
constrain_resources: PNP: 004e.5
skipping PNP: 004e.5 at 62 fixed resource, size=0!
constrain_resources: PNP: 004e.10
constrain_resources: PCI: 00:14.4
constrain_resources: PCI: 00:14.5
constrain_resources: PCI: 00:18.0
constrain_resources: PCI: 00:18.1
constrain_resources: PCI: 00:18.2
constrain_resources: PCI: 00:183
constrain_resources: PCI: 00:18.4
constrain_resources: PCI: 00:18.5
constrain_resources: PCI: 00:18.6
constrain_resources: PCI: 00:18.7
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
lim->base 00000000 lim->limit febfffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:1428 align:12 gran:0 limit:ffff
Assigned: PCI: 00:04.0 1c * [0x1000 - 0x1fff] io
Assigned: PCI: 00:01.0 14 * [0x2000 - 0x20ff] io
Assigned: PCI: 00:11.0 20 * [0x2400 - 0x240f] io
Assigned: PCI: 00:11.0 10 * [0x2410 - 0x2417] io
Assigned: PCI: 00:11.0 18 * [0x2418 - 0x241f] io
Assigned: PCI: 00:11.0 14 * [0x2420 - 0x2423] io
Assigned: PCI: 00:11.0 1c * [0x2424 - 0x2427] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 2428 size: 1428 align: 12 gran: 0 done
PCI: 00:04.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 01:00.0 10 * [0x1000 - 0x10ff] io
PCI: 00:04.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:10247601 align:28 gran:0 limit:febfffff
Assigned: PCI: 00:01.0 10 * [0xe0000000 - 0xefffffff] prefmem
Assigned: PCI: 00:04.0 24 * [0xf0000000 - 0xf00fffff] prefmem
Assigned: PCI: 00:04.0 20 * [0xf0100000 - 0xf01fffff] mem
Assigned: PCI: 00:01.0 18 * [0xf0200000 - 0xf023ffff] mem
Assigned: PCI: 00:14.2 10 * [0xf0240000 - 0xf0243fff] mem
Assigned: PCI: 00:12.0 10 * [0xf0244000 - 0xf0244fff] mem
Assigned: PCI: 00:13.0 10 * [0xf0245000 - 0xf0245fff] mem
Assigned: PCI: 00:14.5 10 * [0xf0246000 - 0xf0246fff] mem
Assigned: PCI: 00:11.0 24 * [0xf0247000 - 0xf02473ff] mem
Assigned: PCI: 00:12.2 10 * [0xf0247400 - 0xf02474ff] mem
Assigned: PCI: 00:13.2 10 * [0xf0247500 - 0xf02475ff] mem
Assigned: PCI: 00:14.3 a0 * [0xf0247600 - 0xf0247600] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f0247601 size: 10247601 align: 28 gran: 0 done
PCI: 00:04.0 allocate_resources_prefmem: base:f0000000 size:100000 align:20 gran:20 limit:febfffff
Assigned: PCI: 01:00.0 20 * [0xf0000000 - 0xf0003fff] prefmem
Assigned: PCI: 01:00.0 18 * [0xf0004000 - 0xf0004fff] prefmem
PCI: 00:04.0 allocate_resources_prefmem: next_base: f0005000 size: 100000 align: 20 gran: 20 done
PCI: 00:04.0 allocate_resources_mem: base:f0100000 size:100000 align:20 gran:20 limit:febfffff
Assigned: PCI: 01:00.0 30 * [0xf0100000 - 0xf011ffff] mem
PCI: 00:04.0 allocate_resources_mem: next_base: f0120000 size: 100000 align: 20 gran: 20 done
PCI: 00:14.4 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:14.4 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:14.4 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Fam14h - cpu_bus_set_resources.
APIC_CLUSTER: 0 c0010058 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x00 mem <mmconfig>
APIC_CLUSTER: 0 assign_resources, bus 0 link: 0
APIC_CLUSTER: 0 assign_resources, bus 0 link: 0
Fam14h - domain_set_resources.
amsr - incoming dev = 00272248
adsr: (before) basek = 0, limitk = 7effffff.
adsr: (after) basek = 0, limitk = 1fbfff, sizek = 1fc000.
adsr - 0xa0000 to 0xbffff resource.
adsr: mmio_basek=00380000, basek=00000300, limitk=001fbfff
0: mmio_basek=00380000, basek=00000300, limitk=001fbfff
adsr - uma_memory_base = 67000000.
adsr - mmio_basek = 380000.
adsr - high_tables_size = e91000.
adsr - adding uma resource.
Fam14h - Adding UMA memory.
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 18 <- [0x00f0200000 - 0x00f023ffff] size 0x00040000 gran 0x12 mem
PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:04.0 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 prefmem
PCI: 00:04.0 20 <- [0x00f0100000 - 0x00f01fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:00.0 18 <- [0x00f0004000 - 0x00f0004fff] size 0x00001000 gran 0x0c prefmem64
PCI: 01:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e prefmem64
PCI: 01:00.0 30 <- [0x00f0100000 - 0x00f011ffff] size 0x00020000 gran 0x11 romem
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f0247000 - 0x00f02473ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00f0244000 - 0x00f0244fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f0247400 - 0x00f02474ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f0245000 - 0x00f0245fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f0247500 - 0x00f02475ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f0240000 - 0x00f0243fff] size 0x00004000 gran 0x0e mem64
SB800 - Lpc.c - lpc_set_resources - Start.
PCI: 00:14.3 a0 <- [0x00f0247600 - 0x00f0247600] size 0x00000001 gran 0x00 mem
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 004e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 004e.5 62 <- [0x0000000064 - 0x0000000063] size 0x00000000 gran 0x00 io
PNP: 004e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
ERROR: PNP: 004e.5 72 irq size: 0x0000000001 not assigned
PNP: 004e.10 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 004e.10 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
SB800 - Lpc.c - lpc_set_resources - End.
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:14.4 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:14.4 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:14.5 10 <- [0x00f0246000 - 0x00f0246fff] size 0x00001000 gran 0x0c mem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
adsr - leaving this lovely routine.
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 APIC_CLUSTER: 0
APIC_CLUSTER: 0 child on link 0 APIC: 00
APIC_CLUSTER: 0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
APIC: 00
APIC: 01
PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
PCI_DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base e0000000 size 10247601 align 28 gran 0 limit febfffff flags 40040200 index 10000100
PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
PCI_DOMAIN: 0000 resource base c0000 size 7ef3fc00 align 0 gran 0 limit 0 flags e0004200 index 20
PCI_DOMAIN: 0000 resource base 67000000 size 18000000 align 0 gran 0 limit 0 flags f0000200 index 7
PCI: 00:00.0
PCI: 00:01.0
PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit febfffff flags 60001200 index 10
PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14
PCI: 00:01.0 resource base f0200000 size 40000 align 18 gran 18 limit febfffff flags 60000200 index 18
PCI: 00:04.0 child on link 0 PCI: 01:00.0
PCI: 00:04.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:04.0 resource base f0000000 size 100000 align 20 gran 20 limit febfffff flags 60081202 index 24
PCI: 00:04.0 resource base f0100000 size 100000 align 20 gran 20 limit febfffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
PCI: 01:00.0 resource base f0004000 size 1000 align 12 gran 12 limit febfffff flags 60001201 index 18
PCI: 01:00.0 resource base f0000000 size 4000 align 14 gran 14 limit febfffff flags 60001201 index 20
PCI: 01:00.0 resource base f0100000 size 20000 align 17 gran 17 limit febfffff flags 60002200 index 30
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:11.0
PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
PCI: 00:11.0 resource base f0247000 size 400 align 10 gran 10 limit febfffff flags 60000200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base f0244000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
PCI: 00:12.1
PCI: 00:12.2
PCI: 00:12.2 resource base f0247400 size 100 align 8 gran 8 limit febfffff flags 60000200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base f0245000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
PCI: 00:13.1
PCI: 00:13.2
PCI: 00:13.2 resource base f0247500 size 100 align 8 gran 8 limit febfffff flags 60000200 index 10
PCI: 00:14.0 child on link 0 I2C: 00:50
I2C: 00:50
I2C: 00:51
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.2 resource base f0240000 size 4000 align 14 gran 14 limit febfffff flags 60000201 index 10
PCI: 00:14.3 child on link 0 PNP: 004e.0
PCI: 00:14.3 resource base f0247600 size 1 align 0 gran 0 limit febfffff flags 60000200 index a0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 004e.0
PNP: 004e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 004e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 004e.3
PNP: 004e.3 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 004e.4
PNP: 004e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
PNP: 004e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.5
PNP: 004e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
PNP: 004e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags e0000100 index 62
PNP: 004e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
PNP: 004e.6
PNP: 004e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 004e.a
PNP: 004e.10
PNP: 004e.10 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 004e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 004e.11
PNP: 004e.11 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 004e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PCI: 00:14.4
PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:14.4 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
PCI: 00:14.4 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
PCI: 00:14.5
PCI: 00:14.5 resource base f0246000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
PCI: 00:15.0
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.0
PCI: 00:16.2
PCI: 00:18.0
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:18.6
PCI: 00:18.7
Done allocating resources.
POST: 0x88
Enabling resources...
Fam14h - domain_enable_resources: AmdInitMid.
agesawrapper_amdinitmid SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
passed.
ader - leaving domain_enable_resources.
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 subsystem <- 1022/1510
PCI: 00:01.0 cmd <- 07
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 07
PCI: 00:11.0 subsystem <- 1022/1510
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1510
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1510
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1510
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1510
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1510
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1510
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1510
PCI: 00:14.3 cmd <- 0f
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 subsystem <- 1022/1510
PCI: 00:14.4 cmd <- 21
PCI: 00:14.5 subsystem <- 1022/1510
PCI: 00:14.5 cmd <- 02
PCI: 00:18.0 subsystem <- 1022/1510
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1510
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1510
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1510
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1510
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1510
PCI: 00:18.5 cmd <- 00
PCI: 00:18.6 subsystem <- 1022/1510
PCI: 00:18.6 cmd <- 00
PCI: 00:18.7 subsystem <- 1022/1510
PCI: 00:18.7 cmd <- 00
PCI: 01:00.0 cmd <- 03
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
start_eip=0x00006000, offset=0x00200000, code_size=0x0000005b
Initializing CPU #0
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
POST: 0x60
Enabling cache
Setting up local apic... apic_id: 0x00 done.
POST: 0x9b
model_14_init done.
CPU #0 initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
POST: 0x93
POST: 0x60
Enabling cache
Setting up local apic... apic_id: 0x01 done.
POST: 0x9b
model_14_init done.
CPU #1 initialized
All AP CPUs stopped (5043 loops)
PCI: 00:00.0 init
Northbridge init
PCI: 00:01.0 init
CBFS: Looking for 'pci1002,9804.rom'
CBFS: found.
In CBFS, ROM address for PCI: 00:01.0 = ffe00778
PCI expansion ROM, signature 0xaa55, INIT size 0xe200, data ptr 0x01b0
PCI ROM image, vendor ID 1002, device ID 9804,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from ffe00778 to 0xc0000, 0xe200 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
... Option ROM returned.
Getting information about VESA mode 4117
framebuffer: e0000000
Setting VESA mode 4117
PCI: 00:11.0 init
AHCI controller IOMEM base: 0xF0247000, IRQ: 0x0
Number of Ports: 0x6, Port implemented(bit map): 0x3f
AHCI/RAID controller initialized
PCI: 00:14.0 init
CBFS: Looking for 'pci1002,4385.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1002,4385.rom'.
PCI: 00:14.4 init
PCI: 00:18.0 init
CBFS: Looking for 'pci1022,1700.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1022,1700.rom'.
PCI: 00:18.1 init
CBFS: Looking for 'pci1022,1701.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1022,1701.rom'.
PCI: 00:18.2 init
CBFS: Looking for 'pci1022,1702.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1022,1702.rom'.
PCI: 00:18.3 init
CBFS: Looking for 'pci1022,1703.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1022,1703.rom'.
PCI: 00:18.4 init
CBFS: Looking for 'pci1022,1704.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1022,1704.rom'.
PCI: 00:18.5 init
CBFS: Looking for 'pci1022,1718.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1022,1718.rom'.
PCI: 00:18.6 init
CBFS: Looking for 'pci1022,1716.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1022,1716.rom'.
PCI: 00:18.7 init
CBFS: Looking for 'pci1022,1719.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci1022,1719.rom'.
PCI: 01:00.0 init
CBFS: Looking for 'pci10ec,8168.rom'
CBFS: ERROR: No file header found at fffffc00, attempting to recover by searching for header
CBFS: Could not find file 'pci10ec,8168.rom'.
Option ROM address for PCI: 01:00.0 = f0100000
PCI expansion ROM, signature 0x0000, INIT size 0x0000, data ptr 0x0000
Incorrect expansion ROM header signature 0000
PNP: 004e.5 init
Keyboard init...
No PS/2 keyboard detected.
PNP: 004e.10 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 0
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 0
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 004e.0: enabled 0
PNP: 004e.3: enabled 0
PNP: 004e.4: enabled 0
PNP: 004e.5: enabled 1
PNP: 004e.6: enabled 0
PNP: 004e.a: enabled 0
PNP: 004e.10: enabled 1
PNP: 004e.11: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 1
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
APIC: 01: enabled 1
PCI: 01:00.0: enabled 1
POST: 0x89
Re-Initializing CBMEM area to 0x6616f000
Initializing CBMEM area to 0x6616f000 (15273984 bytes)
dword=6616f000
nvram_pos=f8, dword>>(8*i)=0
nvram_pos=f9, dword>>(8*i)=f0
nvram_pos=fa, dword>>(8*i)=16
nvram_pos=fb, dword>>(8*i)=66
Adding CBMEM entry as no. 1
Moving GDT to 6616f200...ok
POST: 0x8a
High Tables Base is 6616f000.
POST: 0x9a
SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
agesawrapper_amdinitlate: AmdLateParamsPtr = 220B2
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
In agesawrapper_amdinitlate, AGESA generated ACPI tables:
DmiTable:00000000
AcpiPstate: 00022165
AcpiSrat:00000000
AcpiSlit:00000000
Mce:00022621
Cmc:000226c7
Alib:00022765
SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
BiosAllocateBuffer BiosHeapBaseAddr: 10000
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
mid=0, did=0
mid=0, did=0
mid=0, did=0
mid=c2, did=14
mid=0, did=0
mid=0, did=0
mid=0, did=0
mid=c2, did=14
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
SLP_TYP type was 0
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Adding CBMEM entry as no. 2
Writing IRQ routing tables to 0x6616f400...write_pirq_routing_table done.
PIRQ table: 48 bytes.
POST: 0x9b
Wrote the mp table end at: 000f0410 - 000f0514
Adding CBMEM entry as no. 3
Wrote the mp table end at: 66170410 - 66170514
MP table: 276 bytes.
POST: 0x9c
Adding CBMEM entry as no. 4
ACPI: Writing ACPI tables at 66171400...
ACPI: * DSDT at 661714c8
ACPI: * DSDT @ 661714c8 Length 28cd
ACPI: * FACS at 66173d98
ACPI: * FADT at 66173dd8
ACPI_BLK_BASE: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * HPET at 66173ed0
ACPI: added table 2/32, length now 44
ACPI: * MADT at 66173f08
ACPI: added table 3/32, length now 48
ACPI: added table 4/32, length now 52
ACPI: * SRAT at 66174100
AGESA SRAT table NULL. Skipping.
ACPI: * SLIT at 66174100
AGESA SLIT table NULL. Skipping.
ACPI: * AGESA ALIB SSDT at 66174100
ACPI: added table 5/32, length now 56
ACPI: * AGESA SSDT Pstate at 66175790
ACPI: added table 6/32, length now 60
ACPI: * coreboot TOM SSDT2 at 66175aa0
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 18149 bytes.
Adding CBMEM entry as no. 5
smbios_write_tables: 6617c800
Root Device (AMD Persimmon Mainboard)
APIC_CLUSTER: 0 (AMD Family 14h Root Complex)
APIC: 00 (AMD CPU Family 14h)
PCI_DOMAIN: 0000 (AMD Family 14h Root Complex)
PCI: 00:00.0 (AMD Family 14h Northbridge)
PCI: 00:01.0 (AMD Family 14h Northbridge)
PCI: 00:01.1 (AMD Family 14h Northbridge)
PCI: 00:04.0 (AMD Family 14h Northbridge)
PCI: 00:05.0 (AMD Family 14h Northbridge)
PCI: 00:06.0 (AMD Family 14h Northbridge)
PCI: 00:07.0 (AMD Family 14h Northbridge)
PCI: 00:08.0 (AMD Family 14h Northbridge)
PCI: 00:11.0 (ATI SB800)
PCI: 00:12.0 (ATI SB800)
PCI: 00:12.1 (ATI SB800)
PCI: 00:12.2 (ATI SB800)
PCI: 00:13.0 (ATI SB800)
PCI: 00:13.1 (ATI SB800)
PCI: 00:13.2 (ATI SB800)
PCI: 00:14.0 (ATI SB800)
I2C: 00:50 ()
I2C: 00:51 ()
PCI: 00:14.1 (ATI SB800)
PCI: 00:14.2 (ATI SB800)
PCI: 00:14.3 (ATI SB800)
PNP: 004e.0 (Fintek F81865F Super I/O)
PNP: 004e.3 (Fintek F81865F Super I/O)
PNP: 004e.4 (Fintek F81865F Super I/O)
PNP: 004e.5 (Fintek F81865F Super I/O)
PNP: 004e.6 (Fintek F81865F Super I/O)
PNP: 004e.a (Fintek F81865F Super I/O)
PNP: 004e.10 (Fintek F81865F Super I/O)
PNP: 004e.11 (Fintek F81865F Super I/O)
PCI: 00:14.4 (ATI SB800)
PCI: 00:14.5 (ATI SB800)
PCI: 00:15.0 (ATI SB800)
PCI: 00:15.1 (ATI SB800)
PCI: 00:15.2 (ATI SB800)
PCI: 00:15.3 (ATI SB800)
PCI: 00:16.0 (ATI SB800)
PCI: 00:162 (ATI SB800)
PCI: 00:18.0 (AMD Family 14h Northbridge)
PCI: 00:18.1 (AMD Family 14h Northbridge)
PCI: 00:18.2 (AMD Family 14h Northbridge)
PCI: 00:18.3 (AMD Family 14h Northbridge)
PCI: 00:18.4 (AMD Family 14h Northbridge)
PCI: 00:18.5 (AMD Family 14h Northbridge)
PCI: 00:18.6 (AMD Family 14h Northbridge)
PCI: 00:18.7 (AMD Family 14h Northbridge)
APIC: 01 ()
PCI: 01:00.0 ()
SMBIOS tables: 287 bytes.
POST: 0x9d
Adding CBMEM entry as no. 6
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum c9c6
New low_table_end: 0x00000528
Now going to write high coreboot table at 0x6617d000
rom_table_end = 0x6617d000
Adjust low_table_end from 0x00000528 to 0x00001000
Adjust rom_table_end from 0x6617d000 to 0x66180000
Adding high table area
uma_memory_start=0x67000000, uma_memory_size=0x18000000
coreboot memory table:
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-000000006616efff: RAM
3. 000000006616f000-0000000066ffffff: CONFIGURATION TABLES
4. 0000000067000000-000000007effffff: RESERVED
5. 00000000f8000000-00000000f8ffffff: RESERVED
Wrote coreboot table at: 6617d000, 0x1fc bytes, checksum 18f
coreboot table: 532 bytes.
POST: 0x9e
Adding CBMEM entry as no. 7
Adding CBMEM entry as no. 8
POST: 0x9d
Multiboot Information structure has been written.
0. FREE SPACE 66ff6000 0000a000
1. GDT 6616f200 00000200
2. IRQ TABLE 6616f400 00001000
3. SMP TABLE 66170400 00001000
4. ACPI 66171400 0000b400
5. SMBIOS 6617c800 00000800
6. COREBOOT 6617d000 00008000
7. ACPI RESUME66185000 00e00000
8. ACPISCRATCH66f85000 00071000
CBFS: Looking for 'fallback/payload'
CBFS: found.
Got a payload
Loading segment from rom address 0xffee35f8
code (compression=0)
New segment dstaddr 0xe74a0 memsize 0x18b60 srcaddr 0xffee3630 filesize 0x18b60
(cleaned up) New segment addr 0xe74a0 size 0x18b60 offset 0xffee3630 filesize 0x18b60
Loading segment from rom address 0xffee3614
Entry Point 0x00000000
Loading Segment: addr: 0x00000000000e74a0 memsz: 0x0000000000018b60 filesz: 0x0000000000018b60
lb: [0x0000000000200000, 0x0000000000360000)
Post relocation: addr: 0x00000000000e74a0 memsz: 0x0000000000018b60 filesz: 0x0000000000018b60
it's not compressed!
[ 0x000e74a0, 00100000, 0x00100000) <- ffee3630
dest 000e74a0, end 00100000, bouncebuffer 65eaf000
Loaded segments
Jumping to boot code at fc855
POST: 0xf8
entry = 0x000fc855
lb_start = 0x00200000
lb_size = 0x00160000
adjust = 0x65e0f000
buffer = 0x65eaf000
elf_boot_notes = 0x00272e18
adjusted_boot_notes = 0x66081e18
Start bios (version rel-1.7.0-0-ga026308-20120523_124912-leaky)
Found mainboard AMD Persimmon
Found CBFS header at 0xfffffbf0
Ram Size=0x6616f000 (0x0000000000000000 high)
Relocating init from 0x000e7b40 to 0x66154ae0 (size 41976)
CPU Mhz=1001
Found 22 PCI devices (max PCI bus is 02)
Found 2 cpu(s) max supported 2 cpu(s)
Copying PIR from 0x6616f400 to 0x000fdbc0
Copying MPTABLE from 0x66170400/66170410 to 0x000fdaa0
Copying ACPI RSDP from 0x66171400 to 0x000fda80
Copying SMBIOS entry point from 0x6617c800 to 0x000fda60
Scan for VGA option rom
Found option rom with bad checksum: loc=0x000c0000 len=57856 sum=b
EHCI init on dev 00:12.2 (regs=0xf0247420)
EHCI init on dev 00:13.2 (regs=0xf0247520)
OHCI init on dev 00:14.5 (regs=0xf0246000)
Found 0 lpt ports
Found 3 serial ports
ebda moved from 9fc00 to 9f400
AHCI controller at 11.0, iobase f0247000, irq 0
OHCI init on dev 00:12.0 (regs=0xf0244000)
Searching bootorder for: /pci at i0cf8/*@11/drive at 3/disk at 0
ebda moved from 9f400 to 9f000
ebda moved from 9f000 to 9ec00
AHCI/3: registering: "AHCI/3: KINGSTON SV100S264G ATA-8 Hard-Disk (61057 MiBytes)"
Got ps2 nak (status=51)
USB keyboard initialized
All threads complete.
Scan for option roms
Press F12 for boot menu.
drive 0x000fda00: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=125045424
Returned 57344 bytes of ZoneHigh
e820 map has 6 items:
0: 0000000000000000 - 000000000009ec00 = 1 RAM
1: 000000000009ec00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 000000006616d000 = 1 RAM
4: 000000006616d000 - 000000007f000000 = 2 RESERVED
5: 00000000f8000000 - 00000000f9000000 = 2 RESERVED
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00
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