[coreboot] New patch to review for coreboot: bdab48d Fix address of IDT in real-mode entry
kyosti.malkki at gmail.com
Tue Mar 6 10:35:42 CET 2012
On Tue, 2012-03-06 at 03:59 +0100, Peter Stuge wrote:
> Kyösti Mälkki wrote:
> > commit bdab48d3f13d117bd1100be616837e6d1dbb55fc
> > Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
> > Date: Mon Mar 5 09:25:12 2012 +0200
> > Fix address of IDT in real-mode entry
> Was this tested not to cause regression?
1. Tested as a fix to boot AP CPU on a hyper-threaded Intel
P4 models f29 and f49.
2. Tested to cause no regression to boot a non-hyper-threaded
Intel P4 CPU model f27 on the same platform as #1 testing.
3. Tested to cause no regression to boot AP CPUs on an Intel
P4 Xeon platform with dual socket604 and hyper-threaded model
f25 CPUs. The patch was not required for this platform to boot.
I have no possibility to test other platforms, so any feedback
with AMDs and VIAs is much appreciated.
For these tests, I considered it as a "fix" or "no regression"
if romstage executed with proper console output. Idwer Vollering
proceeded with the tests #1 and #2 for me on a platform with no
supported memory controller.
Test #3 is the A-Open board . Gerrit version is outdated, I have
postponed updates for that until all the dependencies are merged.
More information about the coreboot