[coreboot] New patch to review for coreboot: dc5c7e0 Don't disable ACPI in the S3 resume path

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/971

-gerrit

commit dc5c7e0b63d9b8b3429ae6fb929cbb39efec4159
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Apr 9 12:31:43 2012 -0700

    Don't disable ACPI in the S3 resume path
    
    The OS does not re-execute the APMC 'enable ACPI' SMI
    on resume so this has the potential to leave things
    in an unknown state.
    
    Change-Id: Iaf0fcb99f699e9e0ecacaab3f529026782a95151
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/southbridge/intel/bd82x6x/lpc.c |   15 +++++++++------
 1 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 9a3dc99..dddab6a 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -396,15 +396,18 @@ static void pch_lock_smm(struct device *dev)
 	u8 reg8;
 #endif
 
+	if (acpi_slp_type != 3) {
 #if ENABLE_ACPI_MODE_IN_COREBOOT
-	printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
-	outb(0xe1, 0xb2); // Enable ACPI mode
-	printk(BIOS_DEBUG, "done.\n");
+		printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n");
+		outb(0xe1, 0xb2); // Enable ACPI mode
+		printk(BIOS_DEBUG, "done.\n");
 #else
-	printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
-	outb(0x1e, 0xb2); // Disable ACPI mode
-	printk(BIOS_DEBUG, "done.\n");
+		printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n");
+		outb(0x1e, 0xb2); // Disable ACPI mode
+		printk(BIOS_DEBUG, "done.\n");
 #endif
+	}
+
 	/* Don't allow evil boot loaders, kernels, or
 	 * userspace applications to deceive us:
 	 */