[coreboot] New patch to review for coreboot: ba795bd Make creation of CBMEM_ID_RESUME_SCRATCH depending on Agesa

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/992

-gerrit

commit ba795bd63862f8124ac6f27200a94e303ac04a46
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Wed May 2 16:30:53 2012 -0700

    Make creation of CBMEM_ID_RESUME_SCRATCH depending on Agesa
    
    The CBMEM_ID_RESUME_SCRATCH area is only used by Agesa code, on one
    particular board (AMD Persimmon). Make the creation of that section
    depending on Agesa so it does consume space on non-Agesa systems.
    
    Change-Id: I2a1a4f76991ef936ea68cf75928b20b7ed132b84
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
 src/arch/x86/boot/tables.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c
index 70f3117..4fefc7d 100644
--- a/src/arch/x86/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
@@ -237,8 +237,10 @@ struct lb_memory *write_tables(void)
 	 * the result right now. If it fails, ACPI resume will be disabled.
 	 */
 	cbmem_add(CBMEM_ID_RESUME, HIGH_MEMORY_SAVE);
+#if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY14
 	cbmem_add(CBMEM_ID_RESUME_SCRATCH, CONFIG_HIGH_SCRATCH_MEMORY_SIZE);
 #endif
+#endif
 
 #if CONFIG_MULTIBOOT
 	post_code(0x9d);