[coreboot] Patch merged into coreboot/master: cb60b66 Don't pre-enable SATA AHCI in romstage.c

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit cb60b660540716f4b6671e2b5d21bf75ec9c55e3
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Wed May 2 16:39:56 2012 -0700

    Don't pre-enable SATA AHCI in romstage.c
    
    In a recent commit the SATA code of Panther Point / Cougar Point was
    changed to enable AHCI mode depending on the device tree settings rather
    than a hard code hidden in romstage.c. However, Emerald Lake 2 was not
    fixed up accordingly.
    
    Change-Id: I6c93f386509361e1ab5565b0e4d0e84f0ba282a2
    Signed-off-by: Stefan Reinauer <reinauer at google.com>

Build-Tested: build bot (Jenkins) at Thu May  3 03:25:13 2012, giving +1
See http://review.coreboot.org/995 for details.

-gerrit