[coreboot] New patch to review for coreboot: d757dc5 AMD agesa: add enable cache at the end of disable_cache_as_ram

[Siyuan Wang (wangsiyuanbuaa@gmail.com)]

Siyuan Wang (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1662

-gerrit

commit d757dc5ae74b93c1a809627af93bdcfa036302cd
Author: Siyuan Wang <wangsiyuanbuaa at gmail.com>
Date:   Thu Nov 1 18:51:15 2012 +0800

    AMD agesa: add enable cache at the end of disable_cache_as_ram
    
    add this code according to src/include/cpu/x86/cache.h ,line 92,
    functin enable_cache()
    
    Change-Id: Ida96a98397eeed98dd61ca979e8c5a33bf00f9e5
    Signed-off-by: Siyuan Wang <SiYuan.Wang at amd.com>
    Signed-off-by: Siyuan Wang <wangsiyuanbuaa at gmail.com>
---
 src/cpu/amd/agesa/cache_as_ram.inc | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc
index 389f7ec..7e762ae 100755
--- a/src/cpu/amd/agesa/cache_as_ram.inc
+++ b/src/cpu/amd/agesa/cache_as_ram.inc
@@ -98,6 +98,13 @@ disable_cache_as_ram:
 
   /* Restore the return stack */
   movd %xmm0, %esp
+
+  /* enable cache */
+  movl %cr0, %eax
+  andl $0x9fffffff, %eax
+  movl %eax, %cr0
+  xorl %eax, %eax
+
   ret
 
 cache_as_ram_setup_out: