[coreboot] New patch to review for coreboot: c8a16c9 intel/socket_BGA956: enable more features

[Patrick Georgi (patrick@georgi-clan.de)]

Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1664

-gerrit

commit c8a16c9a9f3cf7eba3ba8392275334f079d364c6
Author: Patrick Georgi <patrick.georgi at secunet.com>
Date:   Thu Nov 1 15:32:32 2012 +0100

    intel/socket_BGA956: enable more features
    
    MMX, SSE, Speedstep are a given there.
    
    Change-Id: I54f34e48e34bb6ab5b9954ab7ece8c2c3a1a8e67
    Signed-off-by: Patrick Georgi <patrick.georgi at secunet.com>
---
 src/cpu/intel/socket_BGA956/Kconfig      | 15 +++++++++++++++
 src/cpu/intel/socket_BGA956/Makefile.inc |  1 +
 2 files changed, 16 insertions(+)

diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig
index a764348..40f82af 100644
--- a/src/cpu/intel/socket_BGA956/Kconfig
+++ b/src/cpu/intel/socket_BGA956/Kconfig
@@ -1,3 +1,18 @@
 config CPU_INTEL_SOCKET_BGA956
 	bool
 	select CPU_INTEL_MODEL_1067X
+	select CACHE_AS_RAM
+	select MMX
+	select SSE
+
+if CPU_INTEL_SOCKET_BGA956
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xffaf8000
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x8000
+
+endif
diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc
index a290e69..f93fa00 100644
--- a/src/cpu/intel/socket_BGA956/Makefile.inc
+++ b/src/cpu/intel/socket_BGA956/Makefile.inc
@@ -7,6 +7,7 @@ subdirs-y += ../../x86/cache
 subdirs-y += ../../x86/smm
 subdirs-y += ../microcode
 subdirs-y += ../hyperthreading
+subdirs-y += ../speedstep
 
 # Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
 cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc