[coreboot] New patch to review for coreboot: 77cf096 Move global variable check to Makefile

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Tue Nov 6 23:51:31 CET 2012


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1692

-gerrit

commit 77cf096ce25458b1d816849d5463d1b6250094f5
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Tue Jul 31 14:52:04 2012 -0700

    Move global variable check to Makefile
    
    Our linker script for romstage checks for global variables and
    makes the build fail if there are any (on non-AMD systems).
    This is great, but having the build fail without any indication
    which variables are global is not very useful.
    
    Moving the check to the Makefile allows us to let the linking stage
    succeed and reveil which variable names end up in the data and bss
    sections of the binary.
    
    To test, add "int foo;" as the first line in src/mainboard/samsung/lumpy/romstage.c
    and build coreboot for Lumpy. See the build break the following
    way:
    
        LINK       cbfs/fallback/romstage_null.debug
        Forbidden global variables in romstage:
        00006a84 B foo
    
    Change-Id: I3c8780888f46a6577ffd36bcea317997b4f84f6f
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
 src/arch/x86/Makefile.inc     | 4 ++++
 src/arch/x86/init/romstage.ld | 2 --
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index c58f3be..e3fa42e 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -341,6 +341,10 @@ ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
 else
 	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld $(romstage-objs)
 endif
+	$(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \
+		echo "Forbidden global variables in romstage:"; \
+		$(NM) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" == y; \
+		else true; fi
 
 $(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
diff --git a/src/arch/x86/init/romstage.ld b/src/arch/x86/init/romstage.ld
index 86093b3..7245794 100644
--- a/src/arch/x86/init/romstage.ld
+++ b/src/arch/x86/init/romstage.ld
@@ -53,6 +53,4 @@ SECTIONS
 	}
 
 	_bogus = ASSERT((SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full");
-	_bogus = ASSERT(SIZEOF(.bss) == 0 || CONFIG_CPU_AMD_AGESA, ".bss is non-zero size in romstage which is not allowed -- global variable?");
-	_bogus = ASSERT(SIZEOF(.data) == 0 || CONFIG_CPU_AMD_AGESA, ".data is non-zero size in romstage which is not allowed -- global variable?");
 }




More information about the coreboot mailing list